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		<id>http://dank.qemfd.net/dankwiki/api.php?action=feedcontributions&amp;user=Dank&amp;feedformat=atom</id>
		<title>blackwiki - user contributions [en]</title>
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		<updated>2012-05-20T01:14:55Z</updated>
		<subtitle>user contributions</subtitle>
		<generator>MediaWiki 1.18.3</generator>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/File:Omphalos.png</id>
		<title>File:Omphalos.png</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/File:Omphalos.png"/>
				<updated>2012-05-18T22:30:58Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: uploaded a new version of &amp;amp;quot;File:Omphalos.png&amp;amp;quot;&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;Omphalos: Network Dominance.&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Dot</id>
		<title>Dot</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Dot"/>
				<updated>2012-05-13T22:20:44Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: /* PNG */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;==SVG==&lt;br /&gt;
* graphviz tools generate svg via -Tsvg&lt;br /&gt;
* [http://github.com/vidarh/diagram-tools notugly] is some XSL to beautify dot's SVG output&lt;br /&gt;
==Examples==&lt;br /&gt;
Generated using Graphviz 2.20.2 and postprocessing via &amp;lt;tt&amp;gt;xsltproc&amp;lt;/tt&amp;gt; and [http://github.com/vidarh/diagram-tools notugly]. I hand-wrote the dot sources.&lt;br /&gt;
===Packed Record===&lt;br /&gt;
[[Image:Opteron.svg|thumb|right|alt=&amp;quot;Dot SVG example (packed record)&amp;quot;|A packed record-type node (click to enlarge)]]&lt;br /&gt;
&amp;lt;pre&amp;gt;digraph G {&lt;br /&gt;
	subgraph clusterOpteron {&lt;br /&gt;
		label=&amp;quot;Quad-Core Opteron&amp;quot;&lt;br /&gt;
		node [shape=record];&lt;br /&gt;
		struct3 [label=&amp;quot;{ {C0|C1|C2|C3}|{L1/L2|L1/L2|L1/L2|L1/L2}|SRI\&lt;br /&gt;
                (SysReq Interface)|&amp;lt;xbar&amp;gt;XBAR (Crossbar Switch)|{MCH|ncHT-HB|HT0|HT1}}&amp;quot;]; &lt;br /&gt;
	}&lt;br /&gt;
} &amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
===Rectilinear arrangement A===&lt;br /&gt;
[[Image:Deneb.svg|thumb|right|alt=&amp;quot;Dot SVG example (rectilinear)&amp;quot;|A rectilinear graph (click to enlarge)]]&lt;br /&gt;
&amp;lt;pre&amp;gt;digraph G {&lt;br /&gt;
	subgraph clusterOpteronNUMA {&lt;br /&gt;
		label = &amp;quot;2x 'Deneb' Phenom II X4 910 (45nm, AM3). 8 threads.&amp;quot;&lt;br /&gt;
		Deneb0-&amp;gt;Deneb1 [dir=&amp;quot;both&amp;quot; label=&amp;quot;2GHz 16-bit bidir\n8GB/s HyperTransport 3.0&amp;quot; color=&amp;quot;blue&amp;quot;]&lt;br /&gt;
		DDR0 -&amp;gt; Deneb0 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		DDR1 -&amp;gt; Deneb1 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		HostBus -&amp;gt; Deneb0 [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		HostBus -&amp;gt; Deneb1 [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		{ rank=same; Deneb0 Deneb1 }&lt;br /&gt;
		{ rank=same; DDR0 DDR1 }&lt;br /&gt;
		Deneb0 [style=filled fillcolor=steelblue shape=box]&lt;br /&gt;
		Deneb1 [style=filled fillcolor=steelblue shape=box]&lt;br /&gt;
		DDR0 [style=filled fillcolor=grey shape=invhouse]&lt;br /&gt;
		DDR1 [style=filled fillcolor=grey shape=invhouse]&lt;br /&gt;
		HostBus [style=filled fillcolor=green shape=Msquare]&lt;br /&gt;
	}&lt;br /&gt;
}&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
===Rectilinear arrangement B===&lt;br /&gt;
[[Image:Nehalem.svg|thumb|right|alt=&amp;quot;Dot SVG example (rectilinear)&amp;quot;|A rectilinear graph  (click to enlarge)]]&lt;br /&gt;
&amp;lt;pre&amp;gt;digraph G {&lt;br /&gt;
	nodesep=&amp;quot;1&amp;quot;&lt;br /&gt;
	subgraph clusterNehalemSMP {&lt;br /&gt;
		DDR0 -&amp;gt; Nehalem0 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		DDR0 -&amp;gt; Nehalem1 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		Nehalem0-&amp;gt;Nehalem1 [dir=&amp;quot;both&amp;quot; label=&amp;quot;25.6GB/s QuickPath&amp;quot; color=&amp;quot;blue&amp;quot;]&lt;br /&gt;
		subgraph clusterNehalemSMP0 {&lt;br /&gt;
			label=&amp;quot;DRAM may or may not be shared.&amp;quot;;&lt;br /&gt;
			style=filled;&lt;br /&gt;
			color=lightgrey;&lt;br /&gt;
			{ rank=same; DDR0 }&lt;br /&gt;
			{ rank=same; Nehalem0 Nehalem1 }&lt;br /&gt;
		}&lt;br /&gt;
		Nehalem2-&amp;gt;Nehalem3 [dir=&amp;quot;both&amp;quot; label=&amp;quot;25.6GB/s QuickPath&amp;quot; color=&amp;quot;blue&amp;quot;]&lt;br /&gt;
		Nehalem2 -&amp;gt; DDR1 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		Nehalem3 -&amp;gt; DDR1 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		subgraph clusterNehalemSMP1 {&lt;br /&gt;
			labelloc=&amp;quot;b&amp;quot;;&lt;br /&gt;
			label=&amp;quot;Each package gets its own MCH and L3 cache,\neach core its own (split) L1 and (unified) L2.&amp;quot;;&lt;br /&gt;
			style=filled;&lt;br /&gt;
			color=lightgrey;&lt;br /&gt;
			{ rank=same; Nehalem2 Nehalem3 }&lt;br /&gt;
			{ rank=same; DDR1 }&lt;br /&gt;
		}&lt;br /&gt;
		label = &amp;quot;4x 'Nehalem-EP' E5520 HT Core i7 (45nm LGA1336). 32 threads.&amp;quot;&lt;br /&gt;
		Nehalem1-&amp;gt;Nehalem2 [dir=&amp;quot;both&amp;quot; color=&amp;quot;blue&amp;quot;]&lt;br /&gt;
		Nehalem3-&amp;gt;Nehalem0 [dir=&amp;quot;both&amp;quot; color=&amp;quot;blue&amp;quot;]&lt;br /&gt;
		Nehalem0-&amp;gt;HostBus [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		Nehalem1-&amp;gt;HostBus [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		HostBus-&amp;gt;Nehalem2 [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		HostBus-&amp;gt;Nehalem3 [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		Nehalem0 [style=filled fillcolor=steelblue shape=box label=&amp;quot;4x 2-way cores&amp;quot;]&lt;br /&gt;
		Nehalem1 [style=filled fillcolor=steelblue shape=box label=&amp;quot;4x 2-way cores&amp;quot;]&lt;br /&gt;
		Nehalem2 [style=filled fillcolor=steelblue shape=box label=&amp;quot;4x 2-way cores&amp;quot;]&lt;br /&gt;
		Nehalem3 [style=filled fillcolor=steelblue shape=box label=&amp;quot;4x 2-way cores&amp;quot;]&lt;br /&gt;
		DDR0 [style=filled fillcolor=grey shape=invtrapezium]&lt;br /&gt;
		DDR1 [style=filled fillcolor=grey shape=trapezium]&lt;br /&gt;
		HostBus [style=filled fillcolor=green shape=Msquare]&lt;br /&gt;
	}&lt;br /&gt;
} &amp;lt;/pre&amp;gt;&lt;br /&gt;
===Large flow===&lt;br /&gt;
[[Image:libtorque.svg|thumb|right|alt=&amp;quot;DOT SVG example (large flow)&amp;quot;|A large flow (click to enlarge)]]&lt;br /&gt;
&amp;lt;pre&amp;gt;digraph G {&lt;br /&gt;
	nodesep=&amp;quot;0.5&amp;quot;&lt;br /&gt;
	subgraph clusterPrime {&lt;br /&gt;
		labelloc=&amp;quot;b&amp;quot;;&lt;br /&gt;
		compound=&amp;quot;true&amp;quot;&lt;br /&gt;
		subgraph clusterKernel {&lt;br /&gt;
			label=&amp;quot;Kernelspace (Linux epoll, FreeBSD kqueue, etc...)&amp;quot;&lt;br /&gt;
			style=filled;&lt;br /&gt;
			color=cadetblue;&lt;br /&gt;
			wqueue0 [style=filled fillcolor=steelblue shape=Mdiamond]&lt;br /&gt;
			wqueueN [style=filled fillcolor=steelblue shape=Mdiamond]&lt;br /&gt;
			wqueue0 -&amp;gt; nics [dir=both]&lt;br /&gt;
			nics [style=&amp;quot;filled,diagonals&amp;quot; fillcolor=greenyellow label=&amp;quot;Devices/IPC&amp;quot;]&lt;br /&gt;
			nics -&amp;gt; wqueueN [dir=both]&lt;br /&gt;
			{ rank=same; wqueue0 wqueueN nics }&lt;br /&gt;
		}&lt;br /&gt;
		subgraph clusterUser {&lt;br /&gt;
			label=&amp;quot;Userspace (libtorque-enabled process)&amp;quot;;&lt;br /&gt;
			style=filled;&lt;br /&gt;
			color=gold;&lt;br /&gt;
			evqueueN [style=&amp;quot;diagonals,filled&amp;quot; fillcolor=mediumpurple shape=invtrapezium group=&amp;quot;evq&amp;quot;]&lt;br /&gt;
			evqueue0 [style=&amp;quot;diagonals,filled&amp;quot; fillcolor=mediumpurple shape=invtrapezium group=&amp;quot;evq&amp;quot;]&lt;br /&gt;
			wqueue0 -&amp;gt; evqueue0 [dir=both style=bold color=&amp;quot;blue:purple&amp;quot;]&lt;br /&gt;
			wqueueN -&amp;gt; evqueueN [dir=both style=bold color=&amp;quot;blue:purple&amp;quot;]&lt;br /&gt;
			evqueue0 -&amp;gt; evqueueN [label=&amp;quot;About sqrt(cpus) evqueues, usually&amp;quot; dir=both style=dotted color=maroon]&lt;br /&gt;
			API -&amp;gt; evqueue0 [style=bold color=purple]&lt;br /&gt;
			API -&amp;gt; evqueueN [style=bold color=purple]&lt;br /&gt;
			API [style=filled fillcolor=green shape=box group=&amp;quot;evq&amp;quot;];&lt;br /&gt;
			{ rank=same; evqueue0 evqueueN }&lt;br /&gt;
			node [shape=record];&lt;br /&gt;
				thr0 [label=&amp;quot;&amp;lt;t0&amp;gt;T0|&amp;lt;t1&amp;gt;T1|&amp;lt;t2&amp;gt;T2|&amp;lt;tN&amp;gt;TN&amp;quot;];&lt;br /&gt;
				thrN [label=&amp;quot;&amp;lt;t0&amp;gt;T0|&amp;lt;t1&amp;gt;T1|&amp;lt;t2&amp;gt;T2|&amp;lt;tN&amp;gt;TN&amp;quot;];&lt;br /&gt;
				color=red;&lt;br /&gt;
			evqueue0 -&amp;gt; thr0:t0 [color=blue]&lt;br /&gt;
			evqueue0 -&amp;gt; thr0:t1 [color=blue]&lt;br /&gt;
			evqueue0 -&amp;gt; thr0:t2 [color=blue]&lt;br /&gt;
			evqueue0 -&amp;gt; thr0:tN [color=blue]&lt;br /&gt;
			evqueueN -&amp;gt; thrN:t0 [color=blue]&lt;br /&gt;
			evqueueN -&amp;gt; thrN:t1 [color=blue]&lt;br /&gt;
			evqueueN -&amp;gt; thrN:t2 [color=blue]&lt;br /&gt;
			evqueueN -&amp;gt; thrN:tN [color=blue]&lt;br /&gt;
			{ rank=same; thr0 thrN }&lt;br /&gt;
			thr0 -&amp;gt; sigtable [color=lightblue style=bold]&lt;br /&gt;
			thr0 -&amp;gt; fdtable [color=lightblue style=bold]&lt;br /&gt;
			thr0 -&amp;gt; twheel [color=lightblue style=bold]&lt;br /&gt;
			thrN -&amp;gt; sigtable [color=lightblue style=bold]&lt;br /&gt;
			thrN -&amp;gt; fdtable [color=lightblue style=bold]&lt;br /&gt;
			thrN -&amp;gt; twheel [color=lightblue style=bold]&lt;br /&gt;
			fdtable [style=filled fillcolor=lightgreen shape=box label=&amp;quot;fd monads\n(array)&amp;quot;]&lt;br /&gt;
			twheel [style=filled fillcolor=lightgreen shape=box label=&amp;quot;timer monads\n(hwheel or array)&amp;quot;]&lt;br /&gt;
			sigtable [style=filled fillcolor=lightgreen shape=box label=&amp;quot;sig monads\n(array)&amp;quot;]&lt;br /&gt;
			sigtable -&amp;gt; fdtable [color=lightblue label=&amp;quot;AIO&amp;quot;]&lt;br /&gt;
			fdtable -&amp;gt; buf [color=lightblue]&lt;br /&gt;
			fdtable -&amp;gt; dnsssl [color=lightblue]&lt;br /&gt;
			twheel -&amp;gt; dnsssl [color=lightblue]&lt;br /&gt;
			buf -&amp;gt; API&lt;br /&gt;
			{ rank=same; sigtable fdtable twheel }&lt;br /&gt;
			dnsssl -&amp;gt; API&lt;br /&gt;
			dnsssl [style=filled fillcolor=lightgreen shape=box label=&amp;quot;DNS, SSL/TLS\n(adns, OpenSSL)&amp;quot;]&lt;br /&gt;
			buf [style=filled fillcolor=lightgreen shape=box label=&amp;quot;Buffering\n(arch-adaptive)&amp;quot;]&lt;br /&gt;
			node [shape=record];&lt;br /&gt;
				appthr [label=&amp;quot;&amp;lt;tmain&amp;gt;Main\nthread|&amp;lt;t1&amp;gt;T1|&amp;lt;t2&amp;gt;T2|&amp;lt;tN&amp;gt;TN&amp;quot;];&lt;br /&gt;
			cbs [style=filled fillcolor=orange shape=box label=&amp;quot;Registered callbacks&amp;quot;];&lt;br /&gt;
			cbs -&amp;gt; appthr [dir=both color=darkgreen]&lt;br /&gt;
			sigtable -&amp;gt; cbs [color=green]&lt;br /&gt;
			fdtable -&amp;gt; cbs [color=green]&lt;br /&gt;
			twheel -&amp;gt; cbs [color=green]&lt;br /&gt;
			buf -&amp;gt; cbs [color=green]&lt;br /&gt;
			dnsssl -&amp;gt; cbs [color=green]&lt;br /&gt;
			cbs -&amp;gt; API;&lt;br /&gt;
			appthr -&amp;gt; API;&lt;br /&gt;
			/*API -&amp;gt; fdtable [color=blueviolet]&lt;br /&gt;
			API -&amp;gt; sigtable [color=blueviolet]&lt;br /&gt;
			API -&amp;gt; twheel [color=blueviolet]*/&lt;br /&gt;
		}&lt;br /&gt;
	}&lt;br /&gt;
} &amp;lt;/pre&amp;gt;&lt;br /&gt;
==PNG==&lt;br /&gt;
Generated with &amp;lt;tt&amp;gt;dot -Tpng&amp;lt;/tt&amp;gt;, no postprocessing.&lt;br /&gt;
===Multiple records===&lt;br /&gt;
[[Image:CUDASHA1input.png|thumb|right|alt=&amp;quot;DOT PNG example (multiple records)&amp;quot;|Multiple records (click to enlarge)]]&lt;br /&gt;
&amp;lt;pre&amp;gt;digraph G {&lt;br /&gt;
	nodesep=&amp;quot;0.1&amp;quot;&lt;br /&gt;
	rankdir=RL;&lt;br /&gt;
	subgraph clusterPrime {&lt;br /&gt;
		label=&amp;quot;SHA-1 input layout\ (b\ hashes\ per\ thread)\nNx1x1 block geometry,\ Gx1x1\ grid\ geometry&amp;quot;;&lt;br /&gt;
		labelloc=&amp;quot;b&amp;quot;;&lt;br /&gt;
		compound=&amp;quot;true&amp;quot;&lt;br /&gt;
		subgraph clusterKernel {&lt;br /&gt;
			color=darkgoldenrod;&lt;br /&gt;
			style=filled;&lt;br /&gt;
			label=&amp;quot;bl0&amp;quot;;&lt;br /&gt;
			b0 [style=filled,width=5,shape=record,label=&amp;quot;{ {Hash\ set\ 1\n(512n\ bits)}\&lt;br /&gt;
                         |{T0[0x0]|T0[0x1]|T0[...]|T0[0xf]}|{T1[0x0]|T1[0x1]|T1[...]|T1[0xf]}|{...|...|...|...}|{Tn[0x0]|Tn[0x1]|Tn[...]|Tn[0xf]}}&amp;quot;];&lt;br /&gt;
			b1 [style=filled,width=5,shape=record,label=&amp;quot;{ {Hash\ set\ b\n(512n\ bits)}\&lt;br /&gt;
                         |{T0[0x0]|T0[0x1]|T0[...]|T0[0xf]}|{T1[0x0]|T1[0x1]|T1[...]|T1[0xf]}|{...|...|...|...}|{Tn[0x0]|Tn[0x1]|Tn[...]|Tn[0xf]}}&amp;quot;];&lt;br /&gt;
			label=&amp;quot;Input to block 1 (512*n*b bits)&amp;quot;;&lt;br /&gt;
		}&lt;br /&gt;
		subgraph clusterUser {&lt;br /&gt;
			color=darkkhaki;&lt;br /&gt;
			style=filled;&lt;br /&gt;
			label=&amp;quot;bl0&amp;quot;;&lt;br /&gt;
			b2 [style=filled,width=5,shape=record,label=&amp;quot;{ {Hash\ set\ 1\n(512n\ bits)}\&lt;br /&gt;
                         |{T0[0x0]|T0[0x1]|T0[...]|T0[0xf]}|{T1[0x0]|T1[0x1]|T1[...]|T1[0xf]}|{...|...|...|...}|{Tn[0x0]|Tn[0x1]|Tn[...]|Tn[0xf]}}&amp;quot;];&lt;br /&gt;
			b3 [style=filled,width=5,shape=record,label=&amp;quot;{ {Hash\ set\ b\n(512n\ bits)}\&lt;br /&gt;
                         |{T0[0x0]|T0[0x1]|T0[...]|T0[0xf]}|{T1[0x0]|T1[0x1]|T1[...]|T1[0xf]}|{...|...|...|...}|{Tn[0x0]|Tn[0x1]|Tn[...]|Tn[0xf]}}&amp;quot;];&lt;br /&gt;
			label=&amp;quot;Input to block G (512*n*b bits)&amp;quot;;&lt;br /&gt;
		}&lt;br /&gt;
	}&lt;br /&gt;
} &amp;lt;/pre&amp;gt;&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Dot</id>
		<title>Dot</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Dot"/>
				<updated>2012-05-13T22:19:03Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: /* Multiple records */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;==SVG==&lt;br /&gt;
* graphviz tools generate svg via -Tsvg&lt;br /&gt;
* [http://github.com/vidarh/diagram-tools notugly] is some XSL to beautify dot's SVG output&lt;br /&gt;
==Examples==&lt;br /&gt;
Generated using Graphviz 2.20.2 and postprocessing via &amp;lt;tt&amp;gt;xsltproc&amp;lt;/tt&amp;gt; and [http://github.com/vidarh/diagram-tools notugly]. I hand-wrote the dot sources.&lt;br /&gt;
===Packed Record===&lt;br /&gt;
[[Image:Opteron.svg|thumb|right|alt=&amp;quot;Dot SVG example (packed record)&amp;quot;|A packed record-type node (click to enlarge)]]&lt;br /&gt;
&amp;lt;pre&amp;gt;digraph G {&lt;br /&gt;
	subgraph clusterOpteron {&lt;br /&gt;
		label=&amp;quot;Quad-Core Opteron&amp;quot;&lt;br /&gt;
		node [shape=record];&lt;br /&gt;
		struct3 [label=&amp;quot;{ {C0|C1|C2|C3}|{L1/L2|L1/L2|L1/L2|L1/L2}|SRI\&lt;br /&gt;
                (SysReq Interface)|&amp;lt;xbar&amp;gt;XBAR (Crossbar Switch)|{MCH|ncHT-HB|HT0|HT1}}&amp;quot;]; &lt;br /&gt;
	}&lt;br /&gt;
} &amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
===Rectilinear arrangement A===&lt;br /&gt;
[[Image:Deneb.svg|thumb|right|alt=&amp;quot;Dot SVG example (rectilinear)&amp;quot;|A rectilinear graph (click to enlarge)]]&lt;br /&gt;
&amp;lt;pre&amp;gt;digraph G {&lt;br /&gt;
	subgraph clusterOpteronNUMA {&lt;br /&gt;
		label = &amp;quot;2x 'Deneb' Phenom II X4 910 (45nm, AM3). 8 threads.&amp;quot;&lt;br /&gt;
		Deneb0-&amp;gt;Deneb1 [dir=&amp;quot;both&amp;quot; label=&amp;quot;2GHz 16-bit bidir\n8GB/s HyperTransport 3.0&amp;quot; color=&amp;quot;blue&amp;quot;]&lt;br /&gt;
		DDR0 -&amp;gt; Deneb0 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		DDR1 -&amp;gt; Deneb1 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		HostBus -&amp;gt; Deneb0 [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		HostBus -&amp;gt; Deneb1 [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		{ rank=same; Deneb0 Deneb1 }&lt;br /&gt;
		{ rank=same; DDR0 DDR1 }&lt;br /&gt;
		Deneb0 [style=filled fillcolor=steelblue shape=box]&lt;br /&gt;
		Deneb1 [style=filled fillcolor=steelblue shape=box]&lt;br /&gt;
		DDR0 [style=filled fillcolor=grey shape=invhouse]&lt;br /&gt;
		DDR1 [style=filled fillcolor=grey shape=invhouse]&lt;br /&gt;
		HostBus [style=filled fillcolor=green shape=Msquare]&lt;br /&gt;
	}&lt;br /&gt;
}&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
===Rectilinear arrangement B===&lt;br /&gt;
[[Image:Nehalem.svg|thumb|right|alt=&amp;quot;Dot SVG example (rectilinear)&amp;quot;|A rectilinear graph  (click to enlarge)]]&lt;br /&gt;
&amp;lt;pre&amp;gt;digraph G {&lt;br /&gt;
	nodesep=&amp;quot;1&amp;quot;&lt;br /&gt;
	subgraph clusterNehalemSMP {&lt;br /&gt;
		DDR0 -&amp;gt; Nehalem0 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		DDR0 -&amp;gt; Nehalem1 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		Nehalem0-&amp;gt;Nehalem1 [dir=&amp;quot;both&amp;quot; label=&amp;quot;25.6GB/s QuickPath&amp;quot; color=&amp;quot;blue&amp;quot;]&lt;br /&gt;
		subgraph clusterNehalemSMP0 {&lt;br /&gt;
			label=&amp;quot;DRAM may or may not be shared.&amp;quot;;&lt;br /&gt;
			style=filled;&lt;br /&gt;
			color=lightgrey;&lt;br /&gt;
			{ rank=same; DDR0 }&lt;br /&gt;
			{ rank=same; Nehalem0 Nehalem1 }&lt;br /&gt;
		}&lt;br /&gt;
		Nehalem2-&amp;gt;Nehalem3 [dir=&amp;quot;both&amp;quot; label=&amp;quot;25.6GB/s QuickPath&amp;quot; color=&amp;quot;blue&amp;quot;]&lt;br /&gt;
		Nehalem2 -&amp;gt; DDR1 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		Nehalem3 -&amp;gt; DDR1 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		subgraph clusterNehalemSMP1 {&lt;br /&gt;
			labelloc=&amp;quot;b&amp;quot;;&lt;br /&gt;
			label=&amp;quot;Each package gets its own MCH and L3 cache,\neach core its own (split) L1 and (unified) L2.&amp;quot;;&lt;br /&gt;
			style=filled;&lt;br /&gt;
			color=lightgrey;&lt;br /&gt;
			{ rank=same; Nehalem2 Nehalem3 }&lt;br /&gt;
			{ rank=same; DDR1 }&lt;br /&gt;
		}&lt;br /&gt;
		label = &amp;quot;4x 'Nehalem-EP' E5520 HT Core i7 (45nm LGA1336). 32 threads.&amp;quot;&lt;br /&gt;
		Nehalem1-&amp;gt;Nehalem2 [dir=&amp;quot;both&amp;quot; color=&amp;quot;blue&amp;quot;]&lt;br /&gt;
		Nehalem3-&amp;gt;Nehalem0 [dir=&amp;quot;both&amp;quot; color=&amp;quot;blue&amp;quot;]&lt;br /&gt;
		Nehalem0-&amp;gt;HostBus [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		Nehalem1-&amp;gt;HostBus [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		HostBus-&amp;gt;Nehalem2 [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		HostBus-&amp;gt;Nehalem3 [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		Nehalem0 [style=filled fillcolor=steelblue shape=box label=&amp;quot;4x 2-way cores&amp;quot;]&lt;br /&gt;
		Nehalem1 [style=filled fillcolor=steelblue shape=box label=&amp;quot;4x 2-way cores&amp;quot;]&lt;br /&gt;
		Nehalem2 [style=filled fillcolor=steelblue shape=box label=&amp;quot;4x 2-way cores&amp;quot;]&lt;br /&gt;
		Nehalem3 [style=filled fillcolor=steelblue shape=box label=&amp;quot;4x 2-way cores&amp;quot;]&lt;br /&gt;
		DDR0 [style=filled fillcolor=grey shape=invtrapezium]&lt;br /&gt;
		DDR1 [style=filled fillcolor=grey shape=trapezium]&lt;br /&gt;
		HostBus [style=filled fillcolor=green shape=Msquare]&lt;br /&gt;
	}&lt;br /&gt;
} &amp;lt;/pre&amp;gt;&lt;br /&gt;
===Large flow===&lt;br /&gt;
[[Image:libtorque.svg|thumb|right|alt=&amp;quot;DOT SVG example (large flow)&amp;quot;|A large flow (click to enlarge)]]&lt;br /&gt;
&amp;lt;pre&amp;gt;digraph G {&lt;br /&gt;
	nodesep=&amp;quot;0.5&amp;quot;&lt;br /&gt;
	subgraph clusterPrime {&lt;br /&gt;
		labelloc=&amp;quot;b&amp;quot;;&lt;br /&gt;
		compound=&amp;quot;true&amp;quot;&lt;br /&gt;
		subgraph clusterKernel {&lt;br /&gt;
			label=&amp;quot;Kernelspace (Linux epoll, FreeBSD kqueue, etc...)&amp;quot;&lt;br /&gt;
			style=filled;&lt;br /&gt;
			color=cadetblue;&lt;br /&gt;
			wqueue0 [style=filled fillcolor=steelblue shape=Mdiamond]&lt;br /&gt;
			wqueueN [style=filled fillcolor=steelblue shape=Mdiamond]&lt;br /&gt;
			wqueue0 -&amp;gt; nics [dir=both]&lt;br /&gt;
			nics [style=&amp;quot;filled,diagonals&amp;quot; fillcolor=greenyellow label=&amp;quot;Devices/IPC&amp;quot;]&lt;br /&gt;
			nics -&amp;gt; wqueueN [dir=both]&lt;br /&gt;
			{ rank=same; wqueue0 wqueueN nics }&lt;br /&gt;
		}&lt;br /&gt;
		subgraph clusterUser {&lt;br /&gt;
			label=&amp;quot;Userspace (libtorque-enabled process)&amp;quot;;&lt;br /&gt;
			style=filled;&lt;br /&gt;
			color=gold;&lt;br /&gt;
			evqueueN [style=&amp;quot;diagonals,filled&amp;quot; fillcolor=mediumpurple shape=invtrapezium group=&amp;quot;evq&amp;quot;]&lt;br /&gt;
			evqueue0 [style=&amp;quot;diagonals,filled&amp;quot; fillcolor=mediumpurple shape=invtrapezium group=&amp;quot;evq&amp;quot;]&lt;br /&gt;
			wqueue0 -&amp;gt; evqueue0 [dir=both style=bold color=&amp;quot;blue:purple&amp;quot;]&lt;br /&gt;
			wqueueN -&amp;gt; evqueueN [dir=both style=bold color=&amp;quot;blue:purple&amp;quot;]&lt;br /&gt;
			evqueue0 -&amp;gt; evqueueN [label=&amp;quot;About sqrt(cpus) evqueues, usually&amp;quot; dir=both style=dotted color=maroon]&lt;br /&gt;
			API -&amp;gt; evqueue0 [style=bold color=purple]&lt;br /&gt;
			API -&amp;gt; evqueueN [style=bold color=purple]&lt;br /&gt;
			API [style=filled fillcolor=green shape=box group=&amp;quot;evq&amp;quot;];&lt;br /&gt;
			{ rank=same; evqueue0 evqueueN }&lt;br /&gt;
			node [shape=record];&lt;br /&gt;
				thr0 [label=&amp;quot;&amp;lt;t0&amp;gt;T0|&amp;lt;t1&amp;gt;T1|&amp;lt;t2&amp;gt;T2|&amp;lt;tN&amp;gt;TN&amp;quot;];&lt;br /&gt;
				thrN [label=&amp;quot;&amp;lt;t0&amp;gt;T0|&amp;lt;t1&amp;gt;T1|&amp;lt;t2&amp;gt;T2|&amp;lt;tN&amp;gt;TN&amp;quot;];&lt;br /&gt;
				color=red;&lt;br /&gt;
			evqueue0 -&amp;gt; thr0:t0 [color=blue]&lt;br /&gt;
			evqueue0 -&amp;gt; thr0:t1 [color=blue]&lt;br /&gt;
			evqueue0 -&amp;gt; thr0:t2 [color=blue]&lt;br /&gt;
			evqueue0 -&amp;gt; thr0:tN [color=blue]&lt;br /&gt;
			evqueueN -&amp;gt; thrN:t0 [color=blue]&lt;br /&gt;
			evqueueN -&amp;gt; thrN:t1 [color=blue]&lt;br /&gt;
			evqueueN -&amp;gt; thrN:t2 [color=blue]&lt;br /&gt;
			evqueueN -&amp;gt; thrN:tN [color=blue]&lt;br /&gt;
			{ rank=same; thr0 thrN }&lt;br /&gt;
			thr0 -&amp;gt; sigtable [color=lightblue style=bold]&lt;br /&gt;
			thr0 -&amp;gt; fdtable [color=lightblue style=bold]&lt;br /&gt;
			thr0 -&amp;gt; twheel [color=lightblue style=bold]&lt;br /&gt;
			thrN -&amp;gt; sigtable [color=lightblue style=bold]&lt;br /&gt;
			thrN -&amp;gt; fdtable [color=lightblue style=bold]&lt;br /&gt;
			thrN -&amp;gt; twheel [color=lightblue style=bold]&lt;br /&gt;
			fdtable [style=filled fillcolor=lightgreen shape=box label=&amp;quot;fd monads\n(array)&amp;quot;]&lt;br /&gt;
			twheel [style=filled fillcolor=lightgreen shape=box label=&amp;quot;timer monads\n(hwheel or array)&amp;quot;]&lt;br /&gt;
			sigtable [style=filled fillcolor=lightgreen shape=box label=&amp;quot;sig monads\n(array)&amp;quot;]&lt;br /&gt;
			sigtable -&amp;gt; fdtable [color=lightblue label=&amp;quot;AIO&amp;quot;]&lt;br /&gt;
			fdtable -&amp;gt; buf [color=lightblue]&lt;br /&gt;
			fdtable -&amp;gt; dnsssl [color=lightblue]&lt;br /&gt;
			twheel -&amp;gt; dnsssl [color=lightblue]&lt;br /&gt;
			buf -&amp;gt; API&lt;br /&gt;
			{ rank=same; sigtable fdtable twheel }&lt;br /&gt;
			dnsssl -&amp;gt; API&lt;br /&gt;
			dnsssl [style=filled fillcolor=lightgreen shape=box label=&amp;quot;DNS, SSL/TLS\n(adns, OpenSSL)&amp;quot;]&lt;br /&gt;
			buf [style=filled fillcolor=lightgreen shape=box label=&amp;quot;Buffering\n(arch-adaptive)&amp;quot;]&lt;br /&gt;
			node [shape=record];&lt;br /&gt;
				appthr [label=&amp;quot;&amp;lt;tmain&amp;gt;Main\nthread|&amp;lt;t1&amp;gt;T1|&amp;lt;t2&amp;gt;T2|&amp;lt;tN&amp;gt;TN&amp;quot;];&lt;br /&gt;
			cbs [style=filled fillcolor=orange shape=box label=&amp;quot;Registered callbacks&amp;quot;];&lt;br /&gt;
			cbs -&amp;gt; appthr [dir=both color=darkgreen]&lt;br /&gt;
			sigtable -&amp;gt; cbs [color=green]&lt;br /&gt;
			fdtable -&amp;gt; cbs [color=green]&lt;br /&gt;
			twheel -&amp;gt; cbs [color=green]&lt;br /&gt;
			buf -&amp;gt; cbs [color=green]&lt;br /&gt;
			dnsssl -&amp;gt; cbs [color=green]&lt;br /&gt;
			cbs -&amp;gt; API;&lt;br /&gt;
			appthr -&amp;gt; API;&lt;br /&gt;
			/*API -&amp;gt; fdtable [color=blueviolet]&lt;br /&gt;
			API -&amp;gt; sigtable [color=blueviolet]&lt;br /&gt;
			API -&amp;gt; twheel [color=blueviolet]*/&lt;br /&gt;
		}&lt;br /&gt;
	}&lt;br /&gt;
} &amp;lt;/pre&amp;gt;&lt;br /&gt;
==PNG==&lt;br /&gt;
===Multiple records===&lt;br /&gt;
[[Image:CUDASHA1input.png|thumb|right|alt=&amp;quot;DOT PNG example (multiple records)&amp;quot;|Multiple records (click to enlarge)]]&lt;br /&gt;
&amp;lt;pre&amp;gt;digraph G {&lt;br /&gt;
	nodesep=&amp;quot;0.1&amp;quot;&lt;br /&gt;
	rankdir=RL;&lt;br /&gt;
	subgraph clusterPrime {&lt;br /&gt;
		label=&amp;quot;SHA-1 input layout\ (b\ hashes\ per\ thread)\nNx1x1 block geometry,\ Gx1x1\ grid\ geometry&amp;quot;;&lt;br /&gt;
		labelloc=&amp;quot;b&amp;quot;;&lt;br /&gt;
		compound=&amp;quot;true&amp;quot;&lt;br /&gt;
		subgraph clusterKernel {&lt;br /&gt;
			color=darkgoldenrod;&lt;br /&gt;
			style=filled;&lt;br /&gt;
			label=&amp;quot;bl0&amp;quot;;&lt;br /&gt;
			b0 [style=filled,width=5,shape=record,label=&amp;quot;{ {Hash\ set\ 1\n(512n\ bits)}\&lt;br /&gt;
                         |{T0[0x0]|T0[0x1]|T0[...]|T0[0xf]}|{T1[0x0]|T1[0x1]|T1[...]|T1[0xf]}|{...|...|...|...}|{Tn[0x0]|Tn[0x1]|Tn[...]|Tn[0xf]}}&amp;quot;];&lt;br /&gt;
			b1 [style=filled,width=5,shape=record,label=&amp;quot;{ {Hash\ set\ b\n(512n\ bits)}\&lt;br /&gt;
                         |{T0[0x0]|T0[0x1]|T0[...]|T0[0xf]}|{T1[0x0]|T1[0x1]|T1[...]|T1[0xf]}|{...|...|...|...}|{Tn[0x0]|Tn[0x1]|Tn[...]|Tn[0xf]}}&amp;quot;];&lt;br /&gt;
			label=&amp;quot;Input to block 1 (512*n*b bits)&amp;quot;;&lt;br /&gt;
		}&lt;br /&gt;
		subgraph clusterUser {&lt;br /&gt;
			color=darkkhaki;&lt;br /&gt;
			style=filled;&lt;br /&gt;
			label=&amp;quot;bl0&amp;quot;;&lt;br /&gt;
			b2 [style=filled,width=5,shape=record,label=&amp;quot;{ {Hash\ set\ 1\n(512n\ bits)}\&lt;br /&gt;
                         |{T0[0x0]|T0[0x1]|T0[...]|T0[0xf]}|{T1[0x0]|T1[0x1]|T1[...]|T1[0xf]}|{...|...|...|...}|{Tn[0x0]|Tn[0x1]|Tn[...]|Tn[0xf]}}&amp;quot;];&lt;br /&gt;
			b3 [style=filled,width=5,shape=record,label=&amp;quot;{ {Hash\ set\ b\n(512n\ bits)}\&lt;br /&gt;
                         |{T0[0x0]|T0[0x1]|T0[...]|T0[0xf]}|{T1[0x0]|T1[0x1]|T1[...]|T1[0xf]}|{...|...|...|...}|{Tn[0x0]|Tn[0x1]|Tn[...]|Tn[0xf]}}&amp;quot;];&lt;br /&gt;
			label=&amp;quot;Input to block G (512*n*b bits)&amp;quot;;&lt;br /&gt;
		}&lt;br /&gt;
	}&lt;br /&gt;
} &amp;lt;/pre&amp;gt;&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Dot</id>
		<title>Dot</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Dot"/>
				<updated>2012-05-13T22:18:23Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: /* PNG */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;==SVG==&lt;br /&gt;
* graphviz tools generate svg via -Tsvg&lt;br /&gt;
* [http://github.com/vidarh/diagram-tools notugly] is some XSL to beautify dot's SVG output&lt;br /&gt;
==Examples==&lt;br /&gt;
Generated using Graphviz 2.20.2 and postprocessing via &amp;lt;tt&amp;gt;xsltproc&amp;lt;/tt&amp;gt; and [http://github.com/vidarh/diagram-tools notugly]. I hand-wrote the dot sources.&lt;br /&gt;
===Packed Record===&lt;br /&gt;
[[Image:Opteron.svg|thumb|right|alt=&amp;quot;Dot SVG example (packed record)&amp;quot;|A packed record-type node (click to enlarge)]]&lt;br /&gt;
&amp;lt;pre&amp;gt;digraph G {&lt;br /&gt;
	subgraph clusterOpteron {&lt;br /&gt;
		label=&amp;quot;Quad-Core Opteron&amp;quot;&lt;br /&gt;
		node [shape=record];&lt;br /&gt;
		struct3 [label=&amp;quot;{ {C0|C1|C2|C3}|{L1/L2|L1/L2|L1/L2|L1/L2}|SRI\&lt;br /&gt;
                (SysReq Interface)|&amp;lt;xbar&amp;gt;XBAR (Crossbar Switch)|{MCH|ncHT-HB|HT0|HT1}}&amp;quot;]; &lt;br /&gt;
	}&lt;br /&gt;
} &amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
===Rectilinear arrangement A===&lt;br /&gt;
[[Image:Deneb.svg|thumb|right|alt=&amp;quot;Dot SVG example (rectilinear)&amp;quot;|A rectilinear graph (click to enlarge)]]&lt;br /&gt;
&amp;lt;pre&amp;gt;digraph G {&lt;br /&gt;
	subgraph clusterOpteronNUMA {&lt;br /&gt;
		label = &amp;quot;2x 'Deneb' Phenom II X4 910 (45nm, AM3). 8 threads.&amp;quot;&lt;br /&gt;
		Deneb0-&amp;gt;Deneb1 [dir=&amp;quot;both&amp;quot; label=&amp;quot;2GHz 16-bit bidir\n8GB/s HyperTransport 3.0&amp;quot; color=&amp;quot;blue&amp;quot;]&lt;br /&gt;
		DDR0 -&amp;gt; Deneb0 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		DDR1 -&amp;gt; Deneb1 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		HostBus -&amp;gt; Deneb0 [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		HostBus -&amp;gt; Deneb1 [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		{ rank=same; Deneb0 Deneb1 }&lt;br /&gt;
		{ rank=same; DDR0 DDR1 }&lt;br /&gt;
		Deneb0 [style=filled fillcolor=steelblue shape=box]&lt;br /&gt;
		Deneb1 [style=filled fillcolor=steelblue shape=box]&lt;br /&gt;
		DDR0 [style=filled fillcolor=grey shape=invhouse]&lt;br /&gt;
		DDR1 [style=filled fillcolor=grey shape=invhouse]&lt;br /&gt;
		HostBus [style=filled fillcolor=green shape=Msquare]&lt;br /&gt;
	}&lt;br /&gt;
}&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
===Rectilinear arrangement B===&lt;br /&gt;
[[Image:Nehalem.svg|thumb|right|alt=&amp;quot;Dot SVG example (rectilinear)&amp;quot;|A rectilinear graph  (click to enlarge)]]&lt;br /&gt;
&amp;lt;pre&amp;gt;digraph G {&lt;br /&gt;
	nodesep=&amp;quot;1&amp;quot;&lt;br /&gt;
	subgraph clusterNehalemSMP {&lt;br /&gt;
		DDR0 -&amp;gt; Nehalem0 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		DDR0 -&amp;gt; Nehalem1 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		Nehalem0-&amp;gt;Nehalem1 [dir=&amp;quot;both&amp;quot; label=&amp;quot;25.6GB/s QuickPath&amp;quot; color=&amp;quot;blue&amp;quot;]&lt;br /&gt;
		subgraph clusterNehalemSMP0 {&lt;br /&gt;
			label=&amp;quot;DRAM may or may not be shared.&amp;quot;;&lt;br /&gt;
			style=filled;&lt;br /&gt;
			color=lightgrey;&lt;br /&gt;
			{ rank=same; DDR0 }&lt;br /&gt;
			{ rank=same; Nehalem0 Nehalem1 }&lt;br /&gt;
		}&lt;br /&gt;
		Nehalem2-&amp;gt;Nehalem3 [dir=&amp;quot;both&amp;quot; label=&amp;quot;25.6GB/s QuickPath&amp;quot; color=&amp;quot;blue&amp;quot;]&lt;br /&gt;
		Nehalem2 -&amp;gt; DDR1 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		Nehalem3 -&amp;gt; DDR1 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		subgraph clusterNehalemSMP1 {&lt;br /&gt;
			labelloc=&amp;quot;b&amp;quot;;&lt;br /&gt;
			label=&amp;quot;Each package gets its own MCH and L3 cache,\neach core its own (split) L1 and (unified) L2.&amp;quot;;&lt;br /&gt;
			style=filled;&lt;br /&gt;
			color=lightgrey;&lt;br /&gt;
			{ rank=same; Nehalem2 Nehalem3 }&lt;br /&gt;
			{ rank=same; DDR1 }&lt;br /&gt;
		}&lt;br /&gt;
		label = &amp;quot;4x 'Nehalem-EP' E5520 HT Core i7 (45nm LGA1336). 32 threads.&amp;quot;&lt;br /&gt;
		Nehalem1-&amp;gt;Nehalem2 [dir=&amp;quot;both&amp;quot; color=&amp;quot;blue&amp;quot;]&lt;br /&gt;
		Nehalem3-&amp;gt;Nehalem0 [dir=&amp;quot;both&amp;quot; color=&amp;quot;blue&amp;quot;]&lt;br /&gt;
		Nehalem0-&amp;gt;HostBus [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		Nehalem1-&amp;gt;HostBus [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		HostBus-&amp;gt;Nehalem2 [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		HostBus-&amp;gt;Nehalem3 [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		Nehalem0 [style=filled fillcolor=steelblue shape=box label=&amp;quot;4x 2-way cores&amp;quot;]&lt;br /&gt;
		Nehalem1 [style=filled fillcolor=steelblue shape=box label=&amp;quot;4x 2-way cores&amp;quot;]&lt;br /&gt;
		Nehalem2 [style=filled fillcolor=steelblue shape=box label=&amp;quot;4x 2-way cores&amp;quot;]&lt;br /&gt;
		Nehalem3 [style=filled fillcolor=steelblue shape=box label=&amp;quot;4x 2-way cores&amp;quot;]&lt;br /&gt;
		DDR0 [style=filled fillcolor=grey shape=invtrapezium]&lt;br /&gt;
		DDR1 [style=filled fillcolor=grey shape=trapezium]&lt;br /&gt;
		HostBus [style=filled fillcolor=green shape=Msquare]&lt;br /&gt;
	}&lt;br /&gt;
} &amp;lt;/pre&amp;gt;&lt;br /&gt;
===Large flow===&lt;br /&gt;
[[Image:libtorque.svg|thumb|right|alt=&amp;quot;DOT SVG example (large flow)&amp;quot;|A large flow (click to enlarge)]]&lt;br /&gt;
&amp;lt;pre&amp;gt;digraph G {&lt;br /&gt;
	nodesep=&amp;quot;0.5&amp;quot;&lt;br /&gt;
	subgraph clusterPrime {&lt;br /&gt;
		labelloc=&amp;quot;b&amp;quot;;&lt;br /&gt;
		compound=&amp;quot;true&amp;quot;&lt;br /&gt;
		subgraph clusterKernel {&lt;br /&gt;
			label=&amp;quot;Kernelspace (Linux epoll, FreeBSD kqueue, etc...)&amp;quot;&lt;br /&gt;
			style=filled;&lt;br /&gt;
			color=cadetblue;&lt;br /&gt;
			wqueue0 [style=filled fillcolor=steelblue shape=Mdiamond]&lt;br /&gt;
			wqueueN [style=filled fillcolor=steelblue shape=Mdiamond]&lt;br /&gt;
			wqueue0 -&amp;gt; nics [dir=both]&lt;br /&gt;
			nics [style=&amp;quot;filled,diagonals&amp;quot; fillcolor=greenyellow label=&amp;quot;Devices/IPC&amp;quot;]&lt;br /&gt;
			nics -&amp;gt; wqueueN [dir=both]&lt;br /&gt;
			{ rank=same; wqueue0 wqueueN nics }&lt;br /&gt;
		}&lt;br /&gt;
		subgraph clusterUser {&lt;br /&gt;
			label=&amp;quot;Userspace (libtorque-enabled process)&amp;quot;;&lt;br /&gt;
			style=filled;&lt;br /&gt;
			color=gold;&lt;br /&gt;
			evqueueN [style=&amp;quot;diagonals,filled&amp;quot; fillcolor=mediumpurple shape=invtrapezium group=&amp;quot;evq&amp;quot;]&lt;br /&gt;
			evqueue0 [style=&amp;quot;diagonals,filled&amp;quot; fillcolor=mediumpurple shape=invtrapezium group=&amp;quot;evq&amp;quot;]&lt;br /&gt;
			wqueue0 -&amp;gt; evqueue0 [dir=both style=bold color=&amp;quot;blue:purple&amp;quot;]&lt;br /&gt;
			wqueueN -&amp;gt; evqueueN [dir=both style=bold color=&amp;quot;blue:purple&amp;quot;]&lt;br /&gt;
			evqueue0 -&amp;gt; evqueueN [label=&amp;quot;About sqrt(cpus) evqueues, usually&amp;quot; dir=both style=dotted color=maroon]&lt;br /&gt;
			API -&amp;gt; evqueue0 [style=bold color=purple]&lt;br /&gt;
			API -&amp;gt; evqueueN [style=bold color=purple]&lt;br /&gt;
			API [style=filled fillcolor=green shape=box group=&amp;quot;evq&amp;quot;];&lt;br /&gt;
			{ rank=same; evqueue0 evqueueN }&lt;br /&gt;
			node [shape=record];&lt;br /&gt;
				thr0 [label=&amp;quot;&amp;lt;t0&amp;gt;T0|&amp;lt;t1&amp;gt;T1|&amp;lt;t2&amp;gt;T2|&amp;lt;tN&amp;gt;TN&amp;quot;];&lt;br /&gt;
				thrN [label=&amp;quot;&amp;lt;t0&amp;gt;T0|&amp;lt;t1&amp;gt;T1|&amp;lt;t2&amp;gt;T2|&amp;lt;tN&amp;gt;TN&amp;quot;];&lt;br /&gt;
				color=red;&lt;br /&gt;
			evqueue0 -&amp;gt; thr0:t0 [color=blue]&lt;br /&gt;
			evqueue0 -&amp;gt; thr0:t1 [color=blue]&lt;br /&gt;
			evqueue0 -&amp;gt; thr0:t2 [color=blue]&lt;br /&gt;
			evqueue0 -&amp;gt; thr0:tN [color=blue]&lt;br /&gt;
			evqueueN -&amp;gt; thrN:t0 [color=blue]&lt;br /&gt;
			evqueueN -&amp;gt; thrN:t1 [color=blue]&lt;br /&gt;
			evqueueN -&amp;gt; thrN:t2 [color=blue]&lt;br /&gt;
			evqueueN -&amp;gt; thrN:tN [color=blue]&lt;br /&gt;
			{ rank=same; thr0 thrN }&lt;br /&gt;
			thr0 -&amp;gt; sigtable [color=lightblue style=bold]&lt;br /&gt;
			thr0 -&amp;gt; fdtable [color=lightblue style=bold]&lt;br /&gt;
			thr0 -&amp;gt; twheel [color=lightblue style=bold]&lt;br /&gt;
			thrN -&amp;gt; sigtable [color=lightblue style=bold]&lt;br /&gt;
			thrN -&amp;gt; fdtable [color=lightblue style=bold]&lt;br /&gt;
			thrN -&amp;gt; twheel [color=lightblue style=bold]&lt;br /&gt;
			fdtable [style=filled fillcolor=lightgreen shape=box label=&amp;quot;fd monads\n(array)&amp;quot;]&lt;br /&gt;
			twheel [style=filled fillcolor=lightgreen shape=box label=&amp;quot;timer monads\n(hwheel or array)&amp;quot;]&lt;br /&gt;
			sigtable [style=filled fillcolor=lightgreen shape=box label=&amp;quot;sig monads\n(array)&amp;quot;]&lt;br /&gt;
			sigtable -&amp;gt; fdtable [color=lightblue label=&amp;quot;AIO&amp;quot;]&lt;br /&gt;
			fdtable -&amp;gt; buf [color=lightblue]&lt;br /&gt;
			fdtable -&amp;gt; dnsssl [color=lightblue]&lt;br /&gt;
			twheel -&amp;gt; dnsssl [color=lightblue]&lt;br /&gt;
			buf -&amp;gt; API&lt;br /&gt;
			{ rank=same; sigtable fdtable twheel }&lt;br /&gt;
			dnsssl -&amp;gt; API&lt;br /&gt;
			dnsssl [style=filled fillcolor=lightgreen shape=box label=&amp;quot;DNS, SSL/TLS\n(adns, OpenSSL)&amp;quot;]&lt;br /&gt;
			buf [style=filled fillcolor=lightgreen shape=box label=&amp;quot;Buffering\n(arch-adaptive)&amp;quot;]&lt;br /&gt;
			node [shape=record];&lt;br /&gt;
				appthr [label=&amp;quot;&amp;lt;tmain&amp;gt;Main\nthread|&amp;lt;t1&amp;gt;T1|&amp;lt;t2&amp;gt;T2|&amp;lt;tN&amp;gt;TN&amp;quot;];&lt;br /&gt;
			cbs [style=filled fillcolor=orange shape=box label=&amp;quot;Registered callbacks&amp;quot;];&lt;br /&gt;
			cbs -&amp;gt; appthr [dir=both color=darkgreen]&lt;br /&gt;
			sigtable -&amp;gt; cbs [color=green]&lt;br /&gt;
			fdtable -&amp;gt; cbs [color=green]&lt;br /&gt;
			twheel -&amp;gt; cbs [color=green]&lt;br /&gt;
			buf -&amp;gt; cbs [color=green]&lt;br /&gt;
			dnsssl -&amp;gt; cbs [color=green]&lt;br /&gt;
			cbs -&amp;gt; API;&lt;br /&gt;
			appthr -&amp;gt; API;&lt;br /&gt;
			/*API -&amp;gt; fdtable [color=blueviolet]&lt;br /&gt;
			API -&amp;gt; sigtable [color=blueviolet]&lt;br /&gt;
			API -&amp;gt; twheel [color=blueviolet]*/&lt;br /&gt;
		}&lt;br /&gt;
	}&lt;br /&gt;
} &amp;lt;/pre&amp;gt;&lt;br /&gt;
==PNG==&lt;br /&gt;
===Multiple records===&lt;br /&gt;
[[Image:CUDASHA1input.png|thumb|right|alt=&amp;quot;DOT PNG example (multiple records)&amp;quot;|Multiple records (click to enlarge)]]&lt;br /&gt;
&amp;lt;pre&amp;gt;digraph G {&lt;br /&gt;
	nodesep=&amp;quot;0.1&amp;quot;&lt;br /&gt;
	rankdir=RL;&lt;br /&gt;
	subgraph clusterPrime {&lt;br /&gt;
		label=&amp;quot;SHA-1 input layout\ (b\ hashes\ per\ thread)\nNx1x1 block geometry,\ Gx1x1\ grid\ geometry&amp;quot;;&lt;br /&gt;
		labelloc=&amp;quot;b&amp;quot;;&lt;br /&gt;
		compound=&amp;quot;true&amp;quot;&lt;br /&gt;
		subgraph clusterKernel {&lt;br /&gt;
			color=darkgoldenrod;&lt;br /&gt;
			style=filled;&lt;br /&gt;
			label=&amp;quot;bl0&amp;quot;;&lt;br /&gt;
			b0 [style=filled,width=5,shape=record,label=&amp;quot;{ {Hash\ set\ 1\n(512n\ bits)}|{T0[0x0]|T0[0x1]|T0[...]|T0[0xf]}|{T1[0x0]|T1[0x1]|T1[...]|T1[0xf]}|{...|...|...|...}|{Tn[0x0]|Tn[0x1]|Tn[...]|Tn[0xf]}}&amp;quot;];&lt;br /&gt;
			b1 [style=filled,width=5,shape=record,label=&amp;quot;{ {Hash\ set\ b\n(512n\ bits)}|{T0[0x0]|T0[0x1]|T0[...]|T0[0xf]}|{T1[0x0]|T1[0x1]|T1[...]|T1[0xf]}|{...|...|...|...}|{Tn[0x0]|Tn[0x1]|Tn[...]|Tn[0xf]}}&amp;quot;];&lt;br /&gt;
			label=&amp;quot;Input to block 1 (512*n*b bits)&amp;quot;;&lt;br /&gt;
		}&lt;br /&gt;
		subgraph clusterUser {&lt;br /&gt;
			color=darkkhaki;&lt;br /&gt;
			style=filled;&lt;br /&gt;
			label=&amp;quot;bl0&amp;quot;;&lt;br /&gt;
			b2 [style=filled,width=5,shape=record,label=&amp;quot;{ {Hash\ set\ 1\n(512n\ bits)}|{T0[0x0]|T0[0x1]|T0[...]|T0[0xf]}|{T1[0x0]|T1[0x1]|T1[...]|T1[0xf]}|{...|...|...|...}|{Tn[0x0]|Tn[0x1]|Tn[...]|Tn[0xf]}}&amp;quot;];&lt;br /&gt;
			b3 [style=filled,width=5,shape=record,label=&amp;quot;{ {Hash\ set\ b\n(512n\ bits)}|{T0[0x0]|T0[0x1]|T0[...]|T0[0xf]}|{T1[0x0]|T1[0x1]|T1[...]|T1[0xf]}|{...|...|...|...}|{Tn[0x0]|Tn[0x1]|Tn[...]|Tn[0xf]}}&amp;quot;];&lt;br /&gt;
			label=&amp;quot;Input to block G (512*n*b bits)&amp;quot;;&lt;br /&gt;
		}&lt;br /&gt;
	}&lt;br /&gt;
} &amp;lt;/pre&amp;gt;&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Dot</id>
		<title>Dot</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Dot"/>
				<updated>2012-05-13T22:17:55Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;==SVG==&lt;br /&gt;
* graphviz tools generate svg via -Tsvg&lt;br /&gt;
* [http://github.com/vidarh/diagram-tools notugly] is some XSL to beautify dot's SVG output&lt;br /&gt;
==Examples==&lt;br /&gt;
Generated using Graphviz 2.20.2 and postprocessing via &amp;lt;tt&amp;gt;xsltproc&amp;lt;/tt&amp;gt; and [http://github.com/vidarh/diagram-tools notugly]. I hand-wrote the dot sources.&lt;br /&gt;
===Packed Record===&lt;br /&gt;
[[Image:Opteron.svg|thumb|right|alt=&amp;quot;Dot SVG example (packed record)&amp;quot;|A packed record-type node (click to enlarge)]]&lt;br /&gt;
&amp;lt;pre&amp;gt;digraph G {&lt;br /&gt;
	subgraph clusterOpteron {&lt;br /&gt;
		label=&amp;quot;Quad-Core Opteron&amp;quot;&lt;br /&gt;
		node [shape=record];&lt;br /&gt;
		struct3 [label=&amp;quot;{ {C0|C1|C2|C3}|{L1/L2|L1/L2|L1/L2|L1/L2}|SRI\&lt;br /&gt;
                (SysReq Interface)|&amp;lt;xbar&amp;gt;XBAR (Crossbar Switch)|{MCH|ncHT-HB|HT0|HT1}}&amp;quot;]; &lt;br /&gt;
	}&lt;br /&gt;
} &amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
===Rectilinear arrangement A===&lt;br /&gt;
[[Image:Deneb.svg|thumb|right|alt=&amp;quot;Dot SVG example (rectilinear)&amp;quot;|A rectilinear graph (click to enlarge)]]&lt;br /&gt;
&amp;lt;pre&amp;gt;digraph G {&lt;br /&gt;
	subgraph clusterOpteronNUMA {&lt;br /&gt;
		label = &amp;quot;2x 'Deneb' Phenom II X4 910 (45nm, AM3). 8 threads.&amp;quot;&lt;br /&gt;
		Deneb0-&amp;gt;Deneb1 [dir=&amp;quot;both&amp;quot; label=&amp;quot;2GHz 16-bit bidir\n8GB/s HyperTransport 3.0&amp;quot; color=&amp;quot;blue&amp;quot;]&lt;br /&gt;
		DDR0 -&amp;gt; Deneb0 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		DDR1 -&amp;gt; Deneb1 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		HostBus -&amp;gt; Deneb0 [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		HostBus -&amp;gt; Deneb1 [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		{ rank=same; Deneb0 Deneb1 }&lt;br /&gt;
		{ rank=same; DDR0 DDR1 }&lt;br /&gt;
		Deneb0 [style=filled fillcolor=steelblue shape=box]&lt;br /&gt;
		Deneb1 [style=filled fillcolor=steelblue shape=box]&lt;br /&gt;
		DDR0 [style=filled fillcolor=grey shape=invhouse]&lt;br /&gt;
		DDR1 [style=filled fillcolor=grey shape=invhouse]&lt;br /&gt;
		HostBus [style=filled fillcolor=green shape=Msquare]&lt;br /&gt;
	}&lt;br /&gt;
}&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
===Rectilinear arrangement B===&lt;br /&gt;
[[Image:Nehalem.svg|thumb|right|alt=&amp;quot;Dot SVG example (rectilinear)&amp;quot;|A rectilinear graph  (click to enlarge)]]&lt;br /&gt;
&amp;lt;pre&amp;gt;digraph G {&lt;br /&gt;
	nodesep=&amp;quot;1&amp;quot;&lt;br /&gt;
	subgraph clusterNehalemSMP {&lt;br /&gt;
		DDR0 -&amp;gt; Nehalem0 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		DDR0 -&amp;gt; Nehalem1 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		Nehalem0-&amp;gt;Nehalem1 [dir=&amp;quot;both&amp;quot; label=&amp;quot;25.6GB/s QuickPath&amp;quot; color=&amp;quot;blue&amp;quot;]&lt;br /&gt;
		subgraph clusterNehalemSMP0 {&lt;br /&gt;
			label=&amp;quot;DRAM may or may not be shared.&amp;quot;;&lt;br /&gt;
			style=filled;&lt;br /&gt;
			color=lightgrey;&lt;br /&gt;
			{ rank=same; DDR0 }&lt;br /&gt;
			{ rank=same; Nehalem0 Nehalem1 }&lt;br /&gt;
		}&lt;br /&gt;
		Nehalem2-&amp;gt;Nehalem3 [dir=&amp;quot;both&amp;quot; label=&amp;quot;25.6GB/s QuickPath&amp;quot; color=&amp;quot;blue&amp;quot;]&lt;br /&gt;
		Nehalem2 -&amp;gt; DDR1 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		Nehalem3 -&amp;gt; DDR1 [dir=&amp;quot;both&amp;quot; color=&amp;quot;lightblue&amp;quot;]&lt;br /&gt;
		subgraph clusterNehalemSMP1 {&lt;br /&gt;
			labelloc=&amp;quot;b&amp;quot;;&lt;br /&gt;
			label=&amp;quot;Each package gets its own MCH and L3 cache,\neach core its own (split) L1 and (unified) L2.&amp;quot;;&lt;br /&gt;
			style=filled;&lt;br /&gt;
			color=lightgrey;&lt;br /&gt;
			{ rank=same; Nehalem2 Nehalem3 }&lt;br /&gt;
			{ rank=same; DDR1 }&lt;br /&gt;
		}&lt;br /&gt;
		label = &amp;quot;4x 'Nehalem-EP' E5520 HT Core i7 (45nm LGA1336). 32 threads.&amp;quot;&lt;br /&gt;
		Nehalem1-&amp;gt;Nehalem2 [dir=&amp;quot;both&amp;quot; color=&amp;quot;blue&amp;quot;]&lt;br /&gt;
		Nehalem3-&amp;gt;Nehalem0 [dir=&amp;quot;both&amp;quot; color=&amp;quot;blue&amp;quot;]&lt;br /&gt;
		Nehalem0-&amp;gt;HostBus [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		Nehalem1-&amp;gt;HostBus [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		HostBus-&amp;gt;Nehalem2 [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		HostBus-&amp;gt;Nehalem3 [dir=&amp;quot;both&amp;quot; color=&amp;quot;darkgreen&amp;quot;]&lt;br /&gt;
		Nehalem0 [style=filled fillcolor=steelblue shape=box label=&amp;quot;4x 2-way cores&amp;quot;]&lt;br /&gt;
		Nehalem1 [style=filled fillcolor=steelblue shape=box label=&amp;quot;4x 2-way cores&amp;quot;]&lt;br /&gt;
		Nehalem2 [style=filled fillcolor=steelblue shape=box label=&amp;quot;4x 2-way cores&amp;quot;]&lt;br /&gt;
		Nehalem3 [style=filled fillcolor=steelblue shape=box label=&amp;quot;4x 2-way cores&amp;quot;]&lt;br /&gt;
		DDR0 [style=filled fillcolor=grey shape=invtrapezium]&lt;br /&gt;
		DDR1 [style=filled fillcolor=grey shape=trapezium]&lt;br /&gt;
		HostBus [style=filled fillcolor=green shape=Msquare]&lt;br /&gt;
	}&lt;br /&gt;
} &amp;lt;/pre&amp;gt;&lt;br /&gt;
===Large flow===&lt;br /&gt;
[[Image:libtorque.svg|thumb|right|alt=&amp;quot;DOT SVG example (large flow)&amp;quot;|A large flow (click to enlarge)]]&lt;br /&gt;
&amp;lt;pre&amp;gt;digraph G {&lt;br /&gt;
	nodesep=&amp;quot;0.5&amp;quot;&lt;br /&gt;
	subgraph clusterPrime {&lt;br /&gt;
		labelloc=&amp;quot;b&amp;quot;;&lt;br /&gt;
		compound=&amp;quot;true&amp;quot;&lt;br /&gt;
		subgraph clusterKernel {&lt;br /&gt;
			label=&amp;quot;Kernelspace (Linux epoll, FreeBSD kqueue, etc...)&amp;quot;&lt;br /&gt;
			style=filled;&lt;br /&gt;
			color=cadetblue;&lt;br /&gt;
			wqueue0 [style=filled fillcolor=steelblue shape=Mdiamond]&lt;br /&gt;
			wqueueN [style=filled fillcolor=steelblue shape=Mdiamond]&lt;br /&gt;
			wqueue0 -&amp;gt; nics [dir=both]&lt;br /&gt;
			nics [style=&amp;quot;filled,diagonals&amp;quot; fillcolor=greenyellow label=&amp;quot;Devices/IPC&amp;quot;]&lt;br /&gt;
			nics -&amp;gt; wqueueN [dir=both]&lt;br /&gt;
			{ rank=same; wqueue0 wqueueN nics }&lt;br /&gt;
		}&lt;br /&gt;
		subgraph clusterUser {&lt;br /&gt;
			label=&amp;quot;Userspace (libtorque-enabled process)&amp;quot;;&lt;br /&gt;
			style=filled;&lt;br /&gt;
			color=gold;&lt;br /&gt;
			evqueueN [style=&amp;quot;diagonals,filled&amp;quot; fillcolor=mediumpurple shape=invtrapezium group=&amp;quot;evq&amp;quot;]&lt;br /&gt;
			evqueue0 [style=&amp;quot;diagonals,filled&amp;quot; fillcolor=mediumpurple shape=invtrapezium group=&amp;quot;evq&amp;quot;]&lt;br /&gt;
			wqueue0 -&amp;gt; evqueue0 [dir=both style=bold color=&amp;quot;blue:purple&amp;quot;]&lt;br /&gt;
			wqueueN -&amp;gt; evqueueN [dir=both style=bold color=&amp;quot;blue:purple&amp;quot;]&lt;br /&gt;
			evqueue0 -&amp;gt; evqueueN [label=&amp;quot;About sqrt(cpus) evqueues, usually&amp;quot; dir=both style=dotted color=maroon]&lt;br /&gt;
			API -&amp;gt; evqueue0 [style=bold color=purple]&lt;br /&gt;
			API -&amp;gt; evqueueN [style=bold color=purple]&lt;br /&gt;
			API [style=filled fillcolor=green shape=box group=&amp;quot;evq&amp;quot;];&lt;br /&gt;
			{ rank=same; evqueue0 evqueueN }&lt;br /&gt;
			node [shape=record];&lt;br /&gt;
				thr0 [label=&amp;quot;&amp;lt;t0&amp;gt;T0|&amp;lt;t1&amp;gt;T1|&amp;lt;t2&amp;gt;T2|&amp;lt;tN&amp;gt;TN&amp;quot;];&lt;br /&gt;
				thrN [label=&amp;quot;&amp;lt;t0&amp;gt;T0|&amp;lt;t1&amp;gt;T1|&amp;lt;t2&amp;gt;T2|&amp;lt;tN&amp;gt;TN&amp;quot;];&lt;br /&gt;
				color=red;&lt;br /&gt;
			evqueue0 -&amp;gt; thr0:t0 [color=blue]&lt;br /&gt;
			evqueue0 -&amp;gt; thr0:t1 [color=blue]&lt;br /&gt;
			evqueue0 -&amp;gt; thr0:t2 [color=blue]&lt;br /&gt;
			evqueue0 -&amp;gt; thr0:tN [color=blue]&lt;br /&gt;
			evqueueN -&amp;gt; thrN:t0 [color=blue]&lt;br /&gt;
			evqueueN -&amp;gt; thrN:t1 [color=blue]&lt;br /&gt;
			evqueueN -&amp;gt; thrN:t2 [color=blue]&lt;br /&gt;
			evqueueN -&amp;gt; thrN:tN [color=blue]&lt;br /&gt;
			{ rank=same; thr0 thrN }&lt;br /&gt;
			thr0 -&amp;gt; sigtable [color=lightblue style=bold]&lt;br /&gt;
			thr0 -&amp;gt; fdtable [color=lightblue style=bold]&lt;br /&gt;
			thr0 -&amp;gt; twheel [color=lightblue style=bold]&lt;br /&gt;
			thrN -&amp;gt; sigtable [color=lightblue style=bold]&lt;br /&gt;
			thrN -&amp;gt; fdtable [color=lightblue style=bold]&lt;br /&gt;
			thrN -&amp;gt; twheel [color=lightblue style=bold]&lt;br /&gt;
			fdtable [style=filled fillcolor=lightgreen shape=box label=&amp;quot;fd monads\n(array)&amp;quot;]&lt;br /&gt;
			twheel [style=filled fillcolor=lightgreen shape=box label=&amp;quot;timer monads\n(hwheel or array)&amp;quot;]&lt;br /&gt;
			sigtable [style=filled fillcolor=lightgreen shape=box label=&amp;quot;sig monads\n(array)&amp;quot;]&lt;br /&gt;
			sigtable -&amp;gt; fdtable [color=lightblue label=&amp;quot;AIO&amp;quot;]&lt;br /&gt;
			fdtable -&amp;gt; buf [color=lightblue]&lt;br /&gt;
			fdtable -&amp;gt; dnsssl [color=lightblue]&lt;br /&gt;
			twheel -&amp;gt; dnsssl [color=lightblue]&lt;br /&gt;
			buf -&amp;gt; API&lt;br /&gt;
			{ rank=same; sigtable fdtable twheel }&lt;br /&gt;
			dnsssl -&amp;gt; API&lt;br /&gt;
			dnsssl [style=filled fillcolor=lightgreen shape=box label=&amp;quot;DNS, SSL/TLS\n(adns, OpenSSL)&amp;quot;]&lt;br /&gt;
			buf [style=filled fillcolor=lightgreen shape=box label=&amp;quot;Buffering\n(arch-adaptive)&amp;quot;]&lt;br /&gt;
			node [shape=record];&lt;br /&gt;
				appthr [label=&amp;quot;&amp;lt;tmain&amp;gt;Main\nthread|&amp;lt;t1&amp;gt;T1|&amp;lt;t2&amp;gt;T2|&amp;lt;tN&amp;gt;TN&amp;quot;];&lt;br /&gt;
			cbs [style=filled fillcolor=orange shape=box label=&amp;quot;Registered callbacks&amp;quot;];&lt;br /&gt;
			cbs -&amp;gt; appthr [dir=both color=darkgreen]&lt;br /&gt;
			sigtable -&amp;gt; cbs [color=green]&lt;br /&gt;
			fdtable -&amp;gt; cbs [color=green]&lt;br /&gt;
			twheel -&amp;gt; cbs [color=green]&lt;br /&gt;
			buf -&amp;gt; cbs [color=green]&lt;br /&gt;
			dnsssl -&amp;gt; cbs [color=green]&lt;br /&gt;
			cbs -&amp;gt; API;&lt;br /&gt;
			appthr -&amp;gt; API;&lt;br /&gt;
			/*API -&amp;gt; fdtable [color=blueviolet]&lt;br /&gt;
			API -&amp;gt; sigtable [color=blueviolet]&lt;br /&gt;
			API -&amp;gt; twheel [color=blueviolet]*/&lt;br /&gt;
		}&lt;br /&gt;
	}&lt;br /&gt;
} &amp;lt;/pre&amp;gt;&lt;br /&gt;
==PNG==&lt;br /&gt;
===Multiple records===&lt;br /&gt;
[[Image:CUDASHA1input.png|thumb|right|alt=&amp;quot;DOT PNG example (multiple records)&amp;quot;|Multiple records (click to enlarge)]]&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/File:CUDASHA1input.png</id>
		<title>File:CUDASHA1input.png</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/File:CUDASHA1input.png"/>
				<updated>2012-05-13T22:16:39Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: Optimal data input layout for CUDA SHA-1&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;Optimal data input layout for CUDA SHA-1&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Compiler_Design</id>
		<title>Compiler Design</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Compiler_Design"/>
				<updated>2012-05-12T20:22:56Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: /* See Also */ fix syntax&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;==Control Flow Analysis==&lt;br /&gt;
Subsequent branch-free instructions make up segments of ''linear code''. The first instruction of the program is a ''leader'', as is every target of a branch, and every instruction immediately following a branch (including conditional branches and procedure returns) is a leader. A ''basic block'' is the maximum segment of linear code associated with each leader -- it ends with either the program's last instruction or the first branch following a leader. ''Points'' exist before and after each statement in a basic block (there are thus a minimum of 2 points per block, and s + 1 for a block with s statements). A basic block a ''flows'' to b if and only if:&lt;br /&gt;
* either b immediately follows a, and a does not end in an unconditional branch,&lt;br /&gt;
* or a ends in a branch, of which b is a potential target.&lt;br /&gt;
Note that an indirect branch, without context information, trivializes all blocks (every instruction becomes a leader) and flows to them all from at least that point (an arborescence is induced)!&lt;br /&gt;
&lt;br /&gt;
The directed  multigraph defined by interpreting basic blocks as vertices, and flow relationships as edges, yields its control flow graph (CFG). A start node exists for each CFG, corresponding to the basic block whose header is the first instruction of the program.&lt;br /&gt;
&lt;br /&gt;
The antisymmetric, transitive, reflexive ''domination relation'' is defined on vertices of a CFG (and thus basic blocks of the underlying program). A vertex a ''dominates'' b (a &amp;lt;= b) if every path from the start node s to b passes through a. A vertex a ''properly dominates'' b (a &amp;lt; b) if a dominates and is not equal to b. A vertex a ''directly/immediately dominates'' b (a &amp;lt;&amp;lt;sub&amp;gt;d&amp;lt;/sub&amp;gt; b) if a properly dominates b, and a dominates no vertex c that dominates b. This relation induces the [[Trees|dominator tree]], where nodes dominate all descendents in the tree. The start node s dominates all nodes, properly dominates all nodes but itself, and roots the dominator tree.&lt;br /&gt;
* It should be obvious that a's preceding of b in the CFG is not necessary for even immediate dominance of b by a.&lt;br /&gt;
''Paths'' p1,p2...pn are defined as sequences of points such that either p&amp;lt;sub&amp;gt;i+1&amp;lt;/sub&amp;gt; immediately follows p&amp;lt;sub&amp;gt;i&amp;lt;/sub&amp;gt; in a basic block, or p&amp;lt;sub&amp;gt;i+1&amp;lt;/sub&amp;gt; begins a successor block to a block terminated by p&amp;lt;sub&amp;gt;i&amp;lt;/sub&amp;gt;. It is on these points that dataflow equations are evaluated.&lt;br /&gt;
&lt;br /&gt;
Dataflow analysis is most usefully performed into and out of ''regions'', subsets of the nodes such that a ''header'' exists which dominates all nodes in the region, and all edges between nodes in the region are themselves in the region. A loop is a region which is strongly connected, where all back-edges to the header are themselves within the region '''FIXME -- unclear'''.&lt;br /&gt;
&lt;br /&gt;
Loops can be discovered via domination analysis (it is important to note that this refers to loops in the generated code, not loop constructs of the source language, and furthermore that all possible loops will be found (ie, unstructured loops constructed from C &amp;lt;tt&amp;gt;gotos&amp;lt;/tt&amp;gt;)). Discover all strongly-connected subgraphs (SCCs) of the CFG (subgraphs where, for each vertex, a path ('''not''' necessarily an edge) exists from that vertex to all other nodes of the subgraph); if a subgraph contains a node dominating all that subgraph's nodes, the subgraph is a loop. The trivial case is, of course, a statement which jumps to itself, ala the BASIC program &amp;lt;tt&amp;gt;10 GOTO 10&amp;lt;/tt&amp;gt;. Implementation via [[Kosaraju's Algorithm]] is simple, with O(|V|+|E|) time complexity using graph encoding and O(N&amp;lt;sup&amp;gt;2&amp;lt;/sup&amp;gt;) time complexity using adjacency matrices:&lt;br /&gt;
* Perform a recursive depth-first traversal of the graph starting from s. Each time you return, add that node onto an auxiliary vector. Upon the traversal's completion, this vector sorts the nodes topologically.&lt;br /&gt;
* Until the the vector is empty, use the last node of the vector to begin traversing the transpose graph. Remove the path from the vector; these paths partition the graph into SCCs.&lt;br /&gt;
Kosaraju's algorithm is improved upon by [[Tarjan's Algorithm]] and [[Gabow's Algorithm]].&lt;br /&gt;
''Natural loop'' identification proceeds via identification of ''back edges'' (edges from a node b to a node a, where a dominates b). A loop is associated with every such back edge; if a backedge exists from b to a, the associated loop is entered at a, and consists additionally of all nodes which can reach b without going through a. Similarly, a loop is associated with the target of every back edge, this being the union of all such backedges' associated natural loops.&lt;br /&gt;
&lt;br /&gt;
===Dead code elimination===&lt;br /&gt;
Control flow analysis by itself is sufficient to remove some ''unreachable code'' (viz ''dead code'', below).&lt;br /&gt;
&lt;br /&gt;
==Dataflow/Dependency Analysis==&lt;br /&gt;
One major purpose of dataflow analysis is observing safety constraints across reordering transformations.&lt;br /&gt;
If a statement S writes to a variable V, S is said to ''define'' V. If statement S reads from a variable V, S is said to ''use'' V (the two are not mutually exclusive). A definition of v is ''killed'' between p1 and p2 if every path between them contains a definition of v; conversely, if a path exists from p1 to p2 which does not redefine v, and v has been defined on input to p1, it ''reaches'' p2 from p1. In this situation, v would furthermore be ''live'' at p1 (or immediately after p1, if p1 assigned it); a variable is live at a point if that instantiation of the variable might be used in the future.&lt;br /&gt;
* Reaching analysis -- forwards dataflow problem, set union as confluence operator&lt;br /&gt;
** Copy propagation eliminates assignment statements, when safe (when modification of upwards-exposed uses of the target may be modified)&lt;br /&gt;
* Liveness analysis -- backwards-may dataflow problem, set union as confluence operator&lt;br /&gt;
** Use-Define chain -- a use U of a variable, and all definitions of that variable which can reach it (those live relative to U)&lt;br /&gt;
** Def-Use chain -- a definition D of a variable, and all uses of that variable it can reach (those reached from D)&lt;br /&gt;
** Common subexpression elimination lexically matches subexpressions, and can preserve them in registers&lt;br /&gt;
** Liveness analysis can detect some instances of ''dead code'' (code whose result is never used, viz ''unreachable code'' above)&lt;br /&gt;
&lt;br /&gt;
===Intermediate Representations===&lt;br /&gt;
* Code is in ''Three-operand'' form iff instructions have no more than 1 destination and no more than 2 sources&lt;br /&gt;
* Three-operand code is in ''Single Static Assignment'' form iff for each variable, that variable is defined at most once, and that definition dominates every use of said variable.&lt;br /&gt;
** This requires the introduction of Φ-nodes, unions of possible values used in definitions ('''FIXME''' describe dominance frontiers etc, develop all of this)&lt;br /&gt;
* SSA and CPS (Continuation-Passing Style) are equivalent (Kelsey 1995, Appel 1998 '''FIXME full citations!''')&lt;br /&gt;
* SSA makes use-def chains explicit, and restricts them to a single element each&lt;br /&gt;
* It's much easier to perform global value numbering optimizations in this representation (see Muchnick, p378-396)&lt;br /&gt;
** Global value numbering is much more complete that basic common subexpression elimination&lt;br /&gt;
** Partial redundancy elimination can be unified with global value numbering&lt;br /&gt;
** Lazy code motion is described in Muchnick p. 407-415&lt;br /&gt;
&lt;br /&gt;
===Loops===&lt;br /&gt;
* Primary references: Allen/Kennedy ch. 2-3, Muchnick ch. 14&lt;br /&gt;
* Statement order within a loop is never a factor in preserving loop-carried dependencies&lt;br /&gt;
&lt;br /&gt;
===Pointers/Aliasing===&lt;br /&gt;
* Why people still write in FORTRAN instead of C&lt;br /&gt;
* Type-based analysis (see [[C99|ANSI C99's]] &amp;lt;tt&amp;gt;restrict&amp;lt;/tt&amp;gt; keyword), [[gcc]]'s &amp;lt;tt&amp;gt;-fstrict-aliasing&amp;lt;/tt&amp;gt; directive)&lt;br /&gt;
** Andersen's points-to analysis is cubic but more precise than Steensgaard's essentially-linear algorithm (See [http://www.cs.wisc.edu/wpis/papers/popl97.ps &amp;quot;Fast and Accurate Flow-Insensitive Points-To Analysis&amp;quot;] (Shapiro, Horwitz, 1997))&lt;br /&gt;
&lt;br /&gt;
==Memory Hierarchy==&lt;br /&gt;
===The role of data dependence in memory optimization===&lt;br /&gt;
* Allen/Kennedy p.383 sums up dataflow analysis's dual nature beautifully. '''FIXME''' rip it off&lt;br /&gt;
* A value computed at the dependence's source (write) and used at its sink (read) is a ''true/flow dependence''&lt;br /&gt;
** Once brought to a lower-level memory, it can be used without refetch so long as it's preserved&lt;br /&gt;
* A value read prior to being recomputed is an ''antidependence''&lt;br /&gt;
** Can exploit sub-unit spatial dependence, primarily with cache blocks&lt;br /&gt;
* A value assigned, and then reassigned prior to use, is an ''output dependence''&lt;br /&gt;
** Restricts life of usages (provides more precise temporal locality information)&lt;br /&gt;
* A value read, and then read again prior to use, is an ''input dependence''&lt;br /&gt;
** Groups life of usages together (provides more complete temporal locality information)&lt;br /&gt;
&lt;br /&gt;
===Registers===&lt;br /&gt;
* Primary references: Allen/Kennedy ch. 8, Muchnick ch. 16&lt;br /&gt;
* Take advantage of temporal locality and, in a sense, spatial locality at the subword level.&lt;br /&gt;
* Loop fusion merges loops in order to enhance temporal locality&lt;br /&gt;
** Especially relevant for machine-generated (preprocessed) input&lt;br /&gt;
&lt;br /&gt;
===Caches===&lt;br /&gt;
* Primary references: Allen/Kennedy ch. 9, Muchnick ch. 20. See also [[Architecture#Caches|Caches]] on the [[Architecture]] page.&lt;br /&gt;
* The benefits of spatial locality can now be taken advantage of at the more natural word level.&lt;br /&gt;
* Loop interchange -- are we striding through nested loops optimally? If not, we can interchange levels, provided all dependencies are preserved. Especially powerful when combined with hardware- or software-based prefetching and further augmented with non-blocking caches. Optimal interpositioning is NP-hard in general but excellent heuristics exist. See Allen/Kennedy p. 472-474.&lt;br /&gt;
** This can be valuable enough that we perform small transformations to accommodate it: loop alignment, loop peeling, etc&lt;br /&gt;
* Loop blocking/tiling/strip-mining -- breaking out subloops to work on a cache-friendly block at once&lt;br /&gt;
** Especially good for parallelizing across coherent processing elements with local, coherent caches -- coherency traffic is minimized&lt;br /&gt;
** Also well-suited for cases of reuse between iterations of a non-innermost loop&lt;br /&gt;
* Loop safety is closed under blocking operations, but not necessarily under interchange.&lt;br /&gt;
** Blocking can, in some cases, make subsequent interchange safe! &amp;quot;If the strip size is less than or equal to the threshold of the dependence that might prevent interchange, then the strip-mine-and-interchange is legal, even though the interchange would not be.&amp;quot; (Allen/Kennedy p. 480)&lt;br /&gt;
&lt;br /&gt;
==See Also==&lt;br /&gt;
* [[gcc]]&lt;br /&gt;
* [http://scienceblogs.com/goodmath/2007/10/computing_strongly_connected_c.php Computing Strongly Connected Subgraphs] from [http://scienceblogs.com/goodmath Good Math, Bad Math]&lt;br /&gt;
* The [http://llvm.org/ LLVM] Compiler Infrastructure Project at [http://www.cs.uiuc.edu/ UIUC]&lt;br /&gt;
* GCC's [http://gcc.gnu.org/projects/tree-ssa/ SSA for Trees] project page&lt;br /&gt;
* &amp;quot;[http://www.cs.lth.se/home/Jonas_Skeppstedt/kongstad.pdf An Implementation of Global Value Numbering in the GNU Compiler Collection, with Performance Measurements]&amp;quot; (Kongstad 2004)&lt;br /&gt;
* &amp;quot;[http://portal.acm.org/citation.cfm?id=255129.255158 On the perfect accuracy of an approximate subscript analysis test]&amp;quot; (Klappholz, Psarris, Kong, 1990) analyzes the GCD and [[Banerjee Inequality|Banerjee inequalities]], explaining the crappiness of the former and general robustness of the latter.&lt;br /&gt;
** &amp;quot;[http://portal.acm.org/citation.cfm?id=110518.110525&amp;amp;coll=&amp;amp;dl=ACM&amp;amp;CFID=15151515&amp;amp;CFTOKEN=6184618 On the Accuracy of the Banerjee Test]&amp;quot; (same authors, 1991) suggests improvements on the [[Banerjee Inequality|Banerjee test]].&lt;br /&gt;
* &amp;quot;[http://portal.acm.org/citation.cfm?id=143129&amp;amp;dl=GUIDE&amp;amp;coll=GUIDE&amp;amp;CFID=31575025&amp;amp;CFTOKEN=24090323 Eliminating False Data Dependencies using the Omega Test]&amp;quot; (Pugh, Wonnacott, 1992) moves from integer programming-based ([http://mathworld.wolfram.com/DiophantineEquation.html Diophantine]) solutions to a subclass of the [http://en.wikipedia.org/wiki/Presburger_arithmetic Presburger formulae].&lt;br /&gt;
* &amp;quot;[http://coyotegulch.com/products/acovea/ Acovea: Using Natural Selection to Investigate Software Complexities]&amp;quot; explores the gcc optimization flag space for a given chunk of code&lt;br /&gt;
* &amp;quot;[http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.36.5532 Combining Register Allocation and Instruction Scheduling]&amp;quot;, a seminal 1995 paper by Motwani et al, explores the complexity of scheduling&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/CUDA</id>
		<title>CUDA</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/CUDA"/>
				<updated>2012-05-07T20:08:04Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: /* Compute Capabilities */ resource table&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;[[File:Gt200die-big.jpg|right|thumb|A &amp;quot;Fermi&amp;quot; GT200 die]]&lt;br /&gt;
==Hardware==&lt;br /&gt;
NVIDIA maintains a list of [http://www.nvidia.com/object/cuda_learn_products.html supported hardware]. For actual hardware, you'll need the &amp;quot;nvidia.ko&amp;quot; kernel module. Download the &amp;lt;tt&amp;gt;nvidia-kernel-source&amp;lt;/tt&amp;gt; and &amp;lt;tt&amp;gt;nvidia-kernel-common&amp;lt;/tt&amp;gt; packages, unpack &amp;lt;tt&amp;gt;/usr/src/nvidia-kernel.tar.bz2&amp;lt;/tt&amp;gt;, and run &amp;lt;tt&amp;gt;make-kpkg modules_image&amp;lt;/tt&amp;gt;. Install the resulting .deb, and modprobe nvidia. You'll see something like this in dmesg output:&amp;lt;pre&amp;gt;nvidia: module license 'NVIDIA' taints kernel.&lt;br /&gt;
Disabling lock debugging due to kernel taint&lt;br /&gt;
nvidia 0000:07:00.0: enabling device (0000 -&amp;gt; 0003)&lt;br /&gt;
nvidia 0000:07:00.0: PCI INT A -&amp;gt; GSI 21 (level, low) -&amp;gt; IRQ 21&lt;br /&gt;
nvidia 0000:07:00.0: setting latency timer to 64&lt;br /&gt;
NVRM: loading NVIDIA UNIX x86_64 Kernel Module  190.53  Wed Dec  9 15:29:46 PST 2009&amp;lt;/pre&amp;gt;&lt;br /&gt;
Once the module is loaded, CUDA should be able to find the device. See [[CUDA#deviceQuery_Output|below]] for sample outputs. Each device has a '''compute capability''', though this does not encompass all differentiated capabilities (see also &amp;lt;tt&amp;gt;deviceOverlap&amp;lt;/tt&amp;gt; and &amp;lt;tt&amp;gt;canMapHostMemory&amp;lt;/tt&amp;gt;...). Note that &amp;quot;emulation mode&amp;quot; has been removed as of CUDA Toolkit Version 3.1.&lt;br /&gt;
==CUDA model==&lt;br /&gt;
===Host===&lt;br /&gt;
* A host contains zero or more CUDA-capable devices (emulation must be used if zero devices are available).&lt;br /&gt;
* It can run multiple CUDA processes, each composed of one or more host threads.&lt;br /&gt;
* A given host thread can execute code on only one device at once.&lt;br /&gt;
* Multiple host threads can execute code on the same device.&lt;br /&gt;
===Device===&lt;br /&gt;
* A device packages a streaming processor array (SPA), a memory interface, and possibly memory (''global memory''. ''device memory'').&lt;br /&gt;
** In CUDA terminology, an ''integrated'' (vs ''discrete'') device does not have its own global memory.&lt;br /&gt;
** Specially-prepared global memory is designated ''constant memory'', and can be [[#Streaming Multiprocessors|cached]].&lt;br /&gt;
* Pinned (''locked'') host memory avoids a bounce buffer, accelerating transfers.&lt;br /&gt;
** Larger one-time setup cost due to device register programming for DMA transfers.&lt;br /&gt;
** This memory will be unswappable -- allocate only as much as is needed.&lt;br /&gt;
* Pinned memory can be mapped directly into CUDAspace on ''integrated'' devices or in the presence of some [[IOMMU|IOMMUs]].&lt;br /&gt;
** &amp;quot;Zero (explicit)-copy&amp;quot; interface (can never hide all bus delays)&lt;br /&gt;
* Write-combining memory (configured via [[MTRR|MTRRs]] or [[Page Attribute Tables|PATs]]) avoids PCI snoop requirements and maximizes linear throughput&lt;br /&gt;
** Subtle side-effects; not to be used glibly or carelessly!&lt;br /&gt;
* Distributes work at ''block'' granularity to [[#Texture Processing Cluster|Texture Processing Clusters]] (TPCs).&lt;br /&gt;
====Texture Processing Cluster====&lt;br /&gt;
[[#Streaming Multiprocessors|Streaming Multiprocessors]] (SMs) are grouped into TPCs. Each TPC contains some number of SMs and a single texture processing unit, including a few filters and a cache for texture memory. The details of these texture caches have not generally been publicized, but NVIDIA optimization guides confirm 1- and 2-dimensional spatial caching to be in effect.&lt;br /&gt;
&lt;br /&gt;
===Streaming Multiprocessor===&lt;br /&gt;
* Each SM has a register file, fast local (''shared'') memory, a cache for constant memory, an instruction cache (ROP), a multithreaded instruction dispatcher, and some number of [[#Stream Processor|Stream Processors]] (SPs).&lt;br /&gt;
** 8192 registers for compute capability &amp;lt;= 1.1, otherwise&lt;br /&gt;
** 16384 for compute capability &amp;lt;= 1.3&lt;br /&gt;
* A group of threads which share a memory and can &amp;quot;synchronize their execution to coördinate accesses to memory&amp;quot; (use a [[barrier]]) form a '''block'''. Each thread has a ''threadId'' within its (three-dimensional) block.&lt;br /&gt;
** For a block of dimensions &amp;amp;lt;D&amp;lt;sub&amp;gt;x&amp;lt;/sub&amp;gt;, D&amp;lt;sub&amp;gt;y&amp;lt;/sub&amp;gt;, D&amp;lt;sub&amp;gt;z&amp;lt;/sub&amp;gt;&amp;amp;gt;, the threadId of the thread having index &amp;amp;lt;x, y, z&amp;amp;gt; is (x + y * D&amp;lt;sub&amp;gt;x&amp;lt;/sub&amp;gt; + z * D&amp;lt;sub&amp;gt;y&amp;lt;/sub&amp;gt; * D&amp;lt;sub&amp;gt;x&amp;lt;/sub&amp;gt;).&lt;br /&gt;
* Register allocation is performed per-block, and rounded up to the nearest&lt;br /&gt;
** 256 registers per block for compute capability &amp;lt;= 1.1, otherwise&lt;br /&gt;
** 512 registers per block for compute capability &amp;lt;= 1.3.&lt;br /&gt;
* A group of blocks which share a kernel form a '''grid'''. Each block (and each thread within that block) has a ''blockId'' within its (two-dimensional) grid.&lt;br /&gt;
** For a grid of dimensions &amp;amp;lt;D&amp;lt;sub&amp;gt;x&amp;lt;/sub&amp;gt;, D&amp;lt;sub&amp;gt;y&amp;lt;/sub&amp;gt;&amp;amp;gt;, the blockId of the block having index &amp;amp;lt;x, y&amp;amp;gt; is (x + y * D&amp;lt;sub&amp;gt;x&amp;lt;/sub&amp;gt;).&lt;br /&gt;
* Thus, a given thread's &amp;amp;lt;blockId X threadId&amp;amp;gt; dyad is unique across the grid. All the threads of a block share a blockId, and corresponding threads of various blocks share a threadId.&lt;br /&gt;
* Each time the kernel is instantiated, new grid and block dimensions may be provided.&lt;br /&gt;
* A block's threads, starting from threadId 0, are broken up into contiguous '''warps''' having some '''warp size''' number of threads.&lt;br /&gt;
* Distributes out-of-order work at ''warp'' granularity across [[#Stream Processor|SPs]].&lt;br /&gt;
** One program counter per warp -- divergence within warp leads to serialization.&lt;br /&gt;
** Divergence is trivially supported with a per-warp stack; warps reconverge at [[Compiler Design|immediate post-dominators]] of branches&lt;br /&gt;
* Supports some maximum number of blocks and threads (~8 and ~768 on G80).&lt;br /&gt;
====Block sizing====&lt;br /&gt;
'''FIXME: review/verify this!'''&lt;br /&gt;
&lt;br /&gt;
How tightly can we bound the optimal block size '''T''', given a warp size ''w''? The number of threads per block ought almost always be a multiple of ''w'', both to:&lt;br /&gt;
* facilitate coalescing (coalescing requirements are related to ''w/2''), and&lt;br /&gt;
* maximize utilization of SPs within warp-granular scheduling.&lt;br /&gt;
A SM has ''r'' registers and ''s'' words of shared memory, allocated per-block (see [[#Streaming Multiprocessors|above]]). Assuming that ''w'' threads can be supported (i.e., that none requires more than ''r/w'' registers or ''s/w'' words of shared memory), the most obvious lower bound is ''w'' itself. The most obvious upper bound, assuming arbitrary available work, is the greatest multiple of ''w'' supported by hardware (and, obviously, the SDK). A block must be scheduled to an SM, which requires:&lt;br /&gt;
* registers sufficient to support the block,&lt;br /&gt;
* shared memory sufficient to support the block,&lt;br /&gt;
* that the total number of threads not exceed some limit ''t'' (likely bounding the divergence-tracking stacks), and&lt;br /&gt;
* that the total number of blocks not exceed some limit ''b'' (likely bounding the warp-scheduling complexity).&lt;br /&gt;
A given SM, then, supports '''T''' values through the minimum of {''r''/'''Thr&amp;lt;sub&amp;gt;reg&amp;lt;/sub&amp;gt;''', ''s''/'''Blk&amp;lt;sub&amp;gt;shmem&amp;lt;/sub&amp;gt;''', and ''t''}; as the block requires fewer registers and less shared memory, the upper bound converges to ''t''.&lt;br /&gt;
&lt;br /&gt;
Motivations for larger blocks include:&lt;br /&gt;
* freedom in the ''b'' dimension exposes parallelism until ''t'' &amp;lt;= ''b'' * '''T'''&lt;br /&gt;
* larger maximum possible kernels (an absolute limit exists on grid dimensions)&lt;br /&gt;
* better if data can be reused among threads (e.g. in tiled matrix multiply)&lt;br /&gt;
Motivations for smaller blocks include:&lt;br /&gt;
* freedom in the ''t'' dimension exposes parallelism until ''t'' &amp;gt;= ''b'' * '''T'''&lt;br /&gt;
* freedom in the ''r'' and ''s'' dimensions exposes parallelism until ''r'' &amp;gt;= ''b'' * '''T''' * '''Thr&amp;lt;sub&amp;gt;reg&amp;lt;/sub&amp;gt;''' or ''s'' &amp;gt;= ''b'' * '''Blk&amp;lt;sub&amp;gt;shmem&amp;lt;/sub&amp;gt;'''.&lt;br /&gt;
* cheaper per-block operations(?) (&amp;lt;tt&amp;gt;__syncthreads()&amp;lt;/tt&amp;gt;, voting, etc)&lt;br /&gt;
* support for older hardware and SDKs&lt;br /&gt;
* fairer distribution among SMs and thus possibly better utilization, lower latency&lt;br /&gt;
** relative speedup tends to 0 as work grows arbitrarily on finite SMs&lt;br /&gt;
** relative speedup tends to ''1/Frac&amp;lt;sub&amp;gt;par&amp;lt;/sub&amp;gt;'' on infinitely many SMs&lt;br /&gt;
We can now optimize occupancy for a specific {''t'', ''b'', ''r'' and ''s''}, assuming ''t'' to be a multiple of both ''w'' and ''b'':&lt;br /&gt;
* Let '''T''' = ''t'' / ''b''. '''T''' is thus guaranteed to be the smallest multiple of ''w'' such that ''t'' == ''b'' * '''T'''.&lt;br /&gt;
* Check the ''r'' and ''w'' conditions. '''FIXME: handle reduction'''&lt;br /&gt;
* '''FIXME: handle very large (''external'') kernels'''&lt;br /&gt;
Optimizing for ranges of hardware values is left as an exercise for the reader. Occupancy is only worth optimizing if the number of warps are insufficient to hide latencies. It might be possible to eliminate latencies altogether by reusing data throughout a block via shared memory; if the algorithm permits, this is almost certainly a net win. In that case, we likely want to maximize '''Blk&amp;lt;sub&amp;gt;shmem&amp;lt;/sub&amp;gt;'''. A more advanced theory would incorporate the arithmetic intensity of a kernel...'''FIXME'''&lt;br /&gt;
&lt;br /&gt;
===Stream Processor===&lt;br /&gt;
* In-order, multithreaded processor: memory latencies can be hidden only by TLP, not ILP.&lt;br /&gt;
** '''UPDATE''' Vasily Volkov's awesome GTC 2010 paper, &amp;quot;[http://www.cs.berkeley.edu/~volkov/volkov10-GTC.pdf Better Performance at Lower Occupancy]&amp;quot;, ''destroys'' this notion.&lt;br /&gt;
*** Really. Go read Vasily's paper. It's better than anything you'll find here.&lt;br /&gt;
** Arithmetic intensity and parallelism are paramount!&lt;br /&gt;
** Memory-bound kernels require sufficiently high ''occupancy'' (the ratio of concurrently-running warps to maximum possible concurrent warps (as applied, usually, to [[#Streaming Multiprocessor|SMs]])) to hide latency.&lt;br /&gt;
* No branch prediction or speculation (and thus also no pipeline flushes on mispredicted branches).&lt;br /&gt;
{| border=&amp;quot;1&amp;quot;&lt;br /&gt;
! Memory type&lt;br /&gt;
! PTX name&lt;br /&gt;
! Sharing&lt;br /&gt;
! Kernel access&lt;br /&gt;
! Host access&lt;br /&gt;
! Cache location&lt;br /&gt;
! Adddressable&lt;br /&gt;
|-&lt;br /&gt;
| Registers&lt;br /&gt;
| .reg&lt;br /&gt;
| Per-thread&lt;br /&gt;
| Read-write&lt;br /&gt;
| None&lt;br /&gt;
| None&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| Special registers&lt;br /&gt;
| .sreg&lt;br /&gt;
| varies&lt;br /&gt;
| Read-only&lt;br /&gt;
| None&lt;br /&gt;
| None&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| Local memory&lt;br /&gt;
| .local&lt;br /&gt;
| Per-thread&lt;br /&gt;
| Read-write&lt;br /&gt;
| None&lt;br /&gt;
| None&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| Shared memory&lt;br /&gt;
| .shared&lt;br /&gt;
| Per-block&lt;br /&gt;
| Read-write&lt;br /&gt;
| None&lt;br /&gt;
| None&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| Global memory&lt;br /&gt;
| .global&lt;br /&gt;
| Global&lt;br /&gt;
| Read-write&lt;br /&gt;
| Read-write&lt;br /&gt;
| '''1.x''': None&lt;br /&gt;
'''2.0+''': L1 on SM, L2 on TPC(?)&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| Constant memory&lt;br /&gt;
| .const&lt;br /&gt;
| Per-grid&lt;br /&gt;
| Read&lt;br /&gt;
| Read-write&lt;br /&gt;
| Stream multiprocessor&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| Texture memory&lt;br /&gt;
| .tex&lt;br /&gt;
| Global&lt;br /&gt;
| Read&lt;br /&gt;
| Read-write&lt;br /&gt;
| Texture processing cluster&lt;br /&gt;
| texture API&lt;br /&gt;
|-&lt;br /&gt;
| Parameters (to grids or functions)&lt;br /&gt;
| .param&lt;br /&gt;
| Per-grid (or per-thread)&lt;br /&gt;
| Read-only (or read-write)&lt;br /&gt;
| None&lt;br /&gt;
| None&lt;br /&gt;
| Yes (or restricted)&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
===Compute Capabilities===&lt;br /&gt;
The original public CUDA revision was 1.0, implemented on the NV50 chipset corresponding to the GeForce 8 series. Compute capability, formed of a non-negative major and minor revision number, can be queried on CUDA-capable cards. All revisions thus far have been backwards-compatible.&lt;br /&gt;
{| border=&amp;quot;1&amp;quot; class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Resource&lt;br /&gt;
! 1.0 SM&lt;br /&gt;
! 1.1 SM&lt;br /&gt;
! 1.2 SM&lt;br /&gt;
! 1.3 SM&lt;br /&gt;
! 2.0 SM&lt;br /&gt;
! 2.1 SM&lt;br /&gt;
! 3.0 SMX&lt;br /&gt;
|-&lt;br /&gt;
|CUDA cores&lt;br /&gt;
|8&lt;br /&gt;
|8&lt;br /&gt;
|8&lt;br /&gt;
|8&lt;br /&gt;
|32&lt;br /&gt;
|48&lt;br /&gt;
|192&lt;br /&gt;
|-&lt;br /&gt;
|Warp schedulers&lt;br /&gt;
|1&lt;br /&gt;
|1&lt;br /&gt;
|1&lt;br /&gt;
|1&lt;br /&gt;
|2&lt;br /&gt;
|2&lt;br /&gt;
|4&lt;br /&gt;
|-&lt;br /&gt;
|Insts/sched&lt;br /&gt;
|1&lt;br /&gt;
|1&lt;br /&gt;
|1&lt;br /&gt;
|1&lt;br /&gt;
|1&lt;br /&gt;
|2&lt;br /&gt;
|2&lt;br /&gt;
|-&lt;br /&gt;
|Threads&lt;br /&gt;
|768&lt;br /&gt;
|768&lt;br /&gt;
|1024&lt;br /&gt;
|1024&lt;br /&gt;
|1536&lt;br /&gt;
|1536&lt;br /&gt;
|2048&lt;br /&gt;
|-&lt;br /&gt;
|Warps&lt;br /&gt;
|24&lt;br /&gt;
|24&lt;br /&gt;
|32&lt;br /&gt;
|32&lt;br /&gt;
|48&lt;br /&gt;
|48&lt;br /&gt;
|64&lt;br /&gt;
|-&lt;br /&gt;
|Blocks&lt;br /&gt;
|8&lt;br /&gt;
|8&lt;br /&gt;
|8&lt;br /&gt;
|8&lt;br /&gt;
|8&lt;br /&gt;
|8&lt;br /&gt;
|16&lt;br /&gt;
|-&lt;br /&gt;
|32-bit registers&lt;br /&gt;
|8192&lt;br /&gt;
|8192&lt;br /&gt;
|16384&lt;br /&gt;
|16384&lt;br /&gt;
|32768&lt;br /&gt;
|32768&lt;br /&gt;
|65536&lt;br /&gt;
|-&lt;br /&gt;
}&lt;br /&gt;
{| border=&amp;quot;1&amp;quot;&lt;br /&gt;
! Revision&lt;br /&gt;
! Changes&lt;br /&gt;
|-&lt;br /&gt;
| 1.1&lt;br /&gt;
|&lt;br /&gt;
* Atomic ops on 32-bit global integers.&lt;br /&gt;
* Breakpoints and other debugging support.&lt;br /&gt;
|- &lt;br /&gt;
| 1.2&lt;br /&gt;
|&lt;br /&gt;
* Atomic ops on 64-bit global integers and 32-bit shared integers.&lt;br /&gt;
* 32 warps (1024 threads) and 16K registers per multiprocessor (MP).&lt;br /&gt;
* Vote instructions.&lt;br /&gt;
* Three MPs per Texture Processing Cluster (TPC).&lt;br /&gt;
* Relaxed memory coalescing constraints.&lt;br /&gt;
|-&lt;br /&gt;
| 1.3&lt;br /&gt;
|&lt;br /&gt;
* Double-precision floating point at 32 cycles per operation.&lt;br /&gt;
|-&lt;br /&gt;
| 2.0&lt;br /&gt;
|&lt;br /&gt;
* 32 cores per SM&lt;br /&gt;
* 4 SFUs&lt;br /&gt;
* Atomic addition on 32-bit global and shared FP.&lt;br /&gt;
* 48 warps (1536 threads), 48K shared memory banked 32 ways, and 32K registers per MP.&lt;br /&gt;
* 512K local memory per thread.&lt;br /&gt;
* &amp;lt;tt&amp;gt;__syncthreads_{count,and,or}()&amp;lt;/tt&amp;gt;, &amp;lt;tt&amp;gt;__threadfence_system()&amp;lt;/tt&amp;gt;, and &amp;lt;tt&amp;gt;__ballot()&amp;lt;/tt&amp;gt;.&lt;br /&gt;
* 1024 threads per block and &amp;lt;tt&amp;gt;blockIdx.{x,y}&amp;lt;/tt&amp;gt; values ranging through 1024.&lt;br /&gt;
* Larger texture references.&lt;br /&gt;
* ''PTX 2.0''&lt;br /&gt;
** Efficient uniform addressing (&amp;lt;tt&amp;gt;ldu&amp;lt;/tt&amp;gt;)&lt;br /&gt;
** Unified address space: &amp;lt;tt&amp;gt;isspacep&amp;lt;/tt&amp;gt;/&amp;lt;tt&amp;gt;cvta&amp;lt;/tt&amp;gt;&lt;br /&gt;
** Prefetching: &amp;lt;tt&amp;gt;prefetch&amp;lt;/tt&amp;gt;/&amp;lt;tt&amp;gt;prefetchu&amp;lt;/tt&amp;gt;&lt;br /&gt;
** Cache modifiers on loads and stores: &amp;lt;tt&amp;gt;.ca&amp;lt;/tt&amp;gt;, &amp;lt;tt&amp;gt;.cg&amp;lt;/tt&amp;gt;, &amp;lt;tt&amp;gt;.cs&amp;lt;/tt&amp;gt;, &amp;lt;tt&amp;gt;.lu&amp;lt;/tt&amp;gt;, &amp;lt;tt&amp;gt;.cv&amp;lt;/tt&amp;gt;&lt;br /&gt;
** New integer ops: &amp;lt;tt&amp;gt;popc&amp;lt;/tt&amp;gt;/&amp;lt;tt&amp;gt;clz&amp;lt;/tt&amp;gt;/&amp;lt;tt&amp;gt;bfind&amp;lt;/tt&amp;gt;/&amp;lt;tt&amp;gt;brev&amp;lt;/tt&amp;gt;/&amp;lt;tt&amp;gt;bfe&amp;lt;/tt&amp;gt;/&amp;lt;tt&amp;gt;bfi&amp;lt;/tt&amp;gt;&lt;br /&gt;
** Video ops: &amp;lt;tt&amp;gt;vadd&amp;lt;/tt&amp;gt;, &amp;lt;tt&amp;gt;vsub&amp;lt;/tt&amp;gt;, &amp;lt;tt&amp;gt;vabsdiff&amp;lt;/tt&amp;gt;, &amp;lt;tt&amp;gt;vmin&amp;lt;/tt&amp;gt;, &amp;lt;tt&amp;gt;vmax&amp;lt;/tt&amp;gt;, &amp;lt;tt&amp;gt;vshl&amp;lt;/tt&amp;gt;, &amp;lt;tt&amp;gt;vshr&amp;lt;/tt&amp;gt;, &amp;lt;tt&amp;gt;vmad&amp;lt;/tt&amp;gt;, &amp;lt;tt&amp;gt;vset&amp;lt;/tt&amp;gt;&lt;br /&gt;
** New special registers: &amp;lt;tt&amp;gt;nsmid&amp;lt;/tt&amp;gt;, &amp;lt;tt&amp;gt;clock64&amp;lt;/tt&amp;gt;, ...).&lt;br /&gt;
|-&lt;br /&gt;
| 2.1&lt;br /&gt;
| &lt;br /&gt;
* 48 cores per SM&lt;br /&gt;
* 8 SFUs per SM, 8 TFUs per ROP&lt;br /&gt;
* 2 warp schedulers per SM, capable of issuing two instructions per clock&lt;br /&gt;
|-&lt;br /&gt;
| 3.0&lt;br /&gt;
| &lt;br /&gt;
* 192 cores per SMX&lt;br /&gt;
* 32 SFUs per SMX, 32 TFUs per ROP&lt;br /&gt;
* 4 warp schedulers per SMX, capable of issuing two instructions per clock&lt;br /&gt;
* ''PTX 3.0''&lt;br /&gt;
** &amp;lt;tt&amp;gt;madc&amp;lt;/tt&amp;gt; and &amp;lt;tt&amp;gt;mad.cc&amp;lt;/tt&amp;gt; instructions&lt;br /&gt;
** Cubemaps and cubearrays for the &amp;lt;tt&amp;gt;tex&amp;lt;/tt&amp;gt; instruction&lt;br /&gt;
** 3D surfaces via the &amp;lt;tt&amp;gt;suld.b.3d&amp;lt;/tt&amp;gt; and &amp;lt;tt&amp;gt;sust.b.3d&amp;lt;/tt&amp;gt; instructions&lt;br /&gt;
** &amp;lt;tt&amp;gt;pmevent.mask&amp;lt;/tt&amp;gt; to trigger multiple performance counters&lt;br /&gt;
** 64-bit grid IDs&lt;br /&gt;
** 4 more performance counters, for a total of 8&lt;br /&gt;
** DWARF debugging symbols support&lt;br /&gt;
&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
==PTX==&lt;br /&gt;
===Syntax Coloring===&lt;br /&gt;
[[File:ptxcolor.png|thumb|right|PTX with syntax coloring]]&lt;br /&gt;
I've got a [[vim]] syntax coloring file for PTX/NVIR/SASS at https://raw.github.com/dankamongmen/dankhome/master/.vim/syntax/nvir.vim. It operates by coloring all registers congruent to some integer mod 10 the same color:&lt;br /&gt;
&amp;lt;pre&amp;gt;syn match asmReg0	&amp;quot;v\?R[0-9]*0\(\.B\|\.F\|\.U\?\(I\|L\)\|\([^0-9]\)\@=\)&amp;quot;&lt;br /&gt;
syn match asmReg1	&amp;quot;v\?R[0-9]*1\(\.B\|\.F\|\.U\?\(I\|L\)\|\([^0-9]\)\@=\)&amp;quot;&lt;br /&gt;
syn match asmReg2	&amp;quot;v\?R[0-9]*2\(\.B\|\.F\|\.U\?\(I\|L\)\|\([^0-9]\)\@=\)&amp;quot;&lt;br /&gt;
syn match asmReg3	&amp;quot;v\?R[0-9]*3\(\.B\|\.F\|\.U\?\(I\|L\)\|\([^0-9]\)\@=\)&amp;quot;&lt;br /&gt;
syn match asmReg4	&amp;quot;v\?R[0-9]*4\(\.B\|\.F\|\.U\?\(I\|L\)\|\([^0-9]\)\@=\)&amp;quot;&lt;br /&gt;
syn match asmReg5	&amp;quot;v\?R[0-9]*5\(\.B\|\.F\|\.U\?\(I\|L\)\|\([^0-9]\)\@=\)&amp;quot;&lt;br /&gt;
syn match asmReg6	&amp;quot;v\?R[0-9]*6\(\.B\|\.F\|\.U\?\(I\|L\)\|\([^0-9]\)\@=\)&amp;quot;&lt;br /&gt;
syn match asmReg7	&amp;quot;v\?R[0-9]*7\(\.B\|\.F\|\.U\?\(I\|L\)\|\([^0-9]\)\@=\)&amp;quot;&lt;br /&gt;
syn match asmReg8	&amp;quot;v\?R[0-9]*8\(\.B\|\.F\|\.U\?\(I\|L\)\|\([^0-9]\)\@=\)&amp;quot;&lt;br /&gt;
syn match asmReg9	&amp;quot;v\?R[0-9]*9\(\.B\|\.F\|\.U\?\(I\|L\)\|\([^0-9]\)\@=\)&amp;quot;&lt;br /&gt;
syn match asmPReg	&amp;quot;P[0-9]\([0-9]*\)\(\.B\|\.F\|\.U\?\(I\|L\)\|\([^0-9]\)\@=\)&amp;quot;&lt;br /&gt;
syn match asmBB		&amp;quot;BB[0-9][0-9]*\(_\d\d*\)\?&amp;quot;&lt;br /&gt;
syn match asmBBNew	&amp;quot;BB-\d\d*&amp;quot;&lt;br /&gt;
syn match nvirNT	&amp;quot;.NEXT_TRUE.*&amp;quot;&lt;br /&gt;
syn match nvirNF	&amp;quot;.NEXT_FALSE.*&amp;quot;&lt;br /&gt;
syn match hexconst	&amp;quot;0x\x\+\(\.F\|\.U\?\(I\|L\)\)\?&amp;quot;&lt;br /&gt;
syn match spreg		&amp;quot;\(ctaid\|ntid\|tid\|nctaid\).\(x\|y\|z\)&amp;quot;&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
==Building CUDA Apps==&lt;br /&gt;
===nvcc flags===&lt;br /&gt;
* &amp;lt;tt&amp;gt;-ptax-options=-v&amp;lt;/tt&amp;gt; displays per-thread register usage&lt;br /&gt;
===SDK's common.mk===&lt;br /&gt;
This assumes use of the SDK's common.mk, as recommended by the documentation.&lt;br /&gt;
* Add the library path to LD_LIBRARY_PATH, assuming CUDA's been installed to a non-standard directory.&lt;br /&gt;
* Set the &amp;lt;tt&amp;gt;CUDA_INSTALL_PATH&amp;lt;/tt&amp;gt; and &amp;lt;tt&amp;gt;ROOTDIR&amp;lt;/tt&amp;gt; (yeargh!) if outside the SDK.&lt;br /&gt;
* I keep the following in &amp;lt;tt&amp;gt;bin/cudasetup&amp;lt;/tt&amp;gt; of my home directory. Source it, using sh's &amp;lt;tt&amp;gt;. cudasetup&amp;lt;/tt&amp;gt; syntax:&lt;br /&gt;
&amp;lt;pre&amp;gt;CUDA=&amp;quot;$HOME/local/cuda/&amp;quot;&lt;br /&gt;
&lt;br /&gt;
export CUDA_INSTALL_PATH=&amp;quot;$CUDA&amp;quot;&lt;br /&gt;
export ROOTDIR=&amp;quot;$CUDA/C/common/&amp;quot;&lt;br /&gt;
if [ -n &amp;quot;$LD_LIBRARY_PATH&amp;quot; ] ; then&lt;br /&gt;
	export &amp;quot;LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$CUDA/lib64&amp;quot;&lt;br /&gt;
else&lt;br /&gt;
	export &amp;quot;LD_LIBRARY_PATH=$CUDA/lib64&amp;quot;&lt;br /&gt;
fi&lt;br /&gt;
&lt;br /&gt;
unset CUDA&amp;lt;/pre&amp;gt;&lt;br /&gt;
* Set EXECUTABLE in your Makefile, and include &amp;lt;tt&amp;gt;$CUDA_INSTALL_PATH/C/common/common.mk&amp;lt;/tt&amp;gt;&lt;br /&gt;
====Unit testing====&lt;br /&gt;
The &amp;lt;tt&amp;gt;DEFAULT_GOAL&amp;lt;/tt&amp;gt; special variable of [[GNU Make]] can be used:&lt;br /&gt;
&amp;lt;pre&amp;gt;.PHONY: test&lt;br /&gt;
.DEFAULT_GOAL:=test&lt;br /&gt;
&lt;br /&gt;
include $(CUDA_INSTALL_PATH)/C/common/common.mk&lt;br /&gt;
&lt;br /&gt;
test: $(TARGET)&lt;br /&gt;
        $(TARGET)&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
==Libraries==&lt;br /&gt;
Two mutually exclusive means of driving CUDA are available: the &amp;quot;Driver API&amp;quot; and &amp;quot;C for CUDA&amp;quot; with its accompanying &amp;lt;tt&amp;gt;nvcc&amp;lt;/tt&amp;gt; compiler and runtime. The latter (&amp;lt;tt&amp;gt;libcudart&amp;lt;/tt&amp;gt;) is built atop the former, and requires its &amp;lt;tt&amp;gt;libcuda&amp;lt;/tt&amp;gt; library.&lt;br /&gt;
===Undocumented Functions===&lt;br /&gt;
The following unlisted functions were extracted from 3.0's libcudart.so using &amp;lt;tt&amp;gt;objdump -T&amp;lt;/tt&amp;gt;:&amp;lt;pre&amp;gt;00000000000097d0 g    DF .text	000000000000020e  Base        __cudaRegisterShared&lt;br /&gt;
0000000000005410 g    DF .text	0000000000000003  Base        __cudaSynchronizeThreads&lt;br /&gt;
0000000000009e60 g    DF .text	0000000000000246  Base        __cudaRegisterVar&lt;br /&gt;
000000000000a0b0 g    DF .text	0000000000000455  Base        __cudaRegisterFatBinary&lt;br /&gt;
00000000000095c0 g    DF .text	000000000000020e  Base        __cudaRegisterSharedVar&lt;br /&gt;
0000000000005420 g    DF .text	0000000000000002  Base        __cudaTextureFetch&lt;br /&gt;
000000000000a510 g    DF .text	00000000000009dd  Base        __cudaUnregisterFatBinary&lt;br /&gt;
00000000000099e0 g    DF .text	000000000000024e  Base        __cudaRegisterFunction&lt;br /&gt;
0000000000005820 g    DF .text	000000000000001c  Base        __cudaMutexOperation&lt;br /&gt;
0000000000009c30 g    DF .text	000000000000022e  Base        __cudaRegisterTexture&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
==deviceQuery info==&lt;br /&gt;
* Memory shown is that amount which is free; I've substituted total VRAM.&lt;br /&gt;
* Most CUDA devices can switch between multiple frequencies; the &amp;quot;Clock rate&amp;quot; output ought be considered accurate only at a given moment, and the outputs listed here are merely illustrative.&lt;br /&gt;
* Three device modes are currently supported:&lt;br /&gt;
** 0: Default (multiple applications can use the device)&lt;br /&gt;
** 1: Exclusive (only one application may use the device; other calls to &amp;lt;tt&amp;gt;cuCtxCreate&amp;lt;/tt&amp;gt; will fail)&lt;br /&gt;
** 2: Disabled (no applications may use the device; all calls to &amp;lt;tt&amp;gt;cuCtxCreate&amp;lt;/tt&amp;gt; will fail&lt;br /&gt;
* The mode can be set using &amp;lt;tt&amp;gt;nvidia-smi&amp;lt;/tt&amp;gt;'s -c option, specifying the device number via -g.&lt;br /&gt;
* A run time limit is activated by default if the device is being used to drive a display.&lt;br /&gt;
* Please feel free to [mailto:nickblack@acm.org send me output!]&lt;br /&gt;
{| border=&amp;quot;1&amp;quot;&lt;br /&gt;
! Device name&lt;br /&gt;
! Memory&lt;br /&gt;
! MP's&lt;br /&gt;
! Cores&lt;br /&gt;
! Const mem&lt;br /&gt;
! Shmem/block&lt;br /&gt;
! Reg/block&lt;br /&gt;
! Warp size&lt;br /&gt;
! Thr/block&lt;br /&gt;
! Max pitch&lt;br /&gt;
! Texalign&lt;br /&gt;
! Clock&lt;br /&gt;
! C+E?&lt;br /&gt;
! Integrated?&lt;br /&gt;
! Shared maps?&lt;br /&gt;
|-&lt;br /&gt;
! COLSPAN=&amp;quot;15&amp;quot; style=&amp;quot;background:#8070D8;&amp;quot; | Compute capability 3.0&lt;br /&gt;
|-&lt;br /&gt;
| GeForce GTX 680&lt;br /&gt;
| 1.5GB&lt;br /&gt;
| 8&lt;br /&gt;
| 1536&lt;br /&gt;
| &lt;br /&gt;
|&lt;br /&gt;
| 32&lt;br /&gt;
| 1024&lt;br /&gt;
|&lt;br /&gt;
|&lt;br /&gt;
|&lt;br /&gt;
|&lt;br /&gt;
|&lt;br /&gt;
| No&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
! COLSPAN=&amp;quot;15&amp;quot; style=&amp;quot;background:#ffdead;&amp;quot; | Compute capability 2.1&lt;br /&gt;
|-&lt;br /&gt;
| GeForce GTX 460&lt;br /&gt;
| 1GB&lt;br /&gt;
| 7&lt;br /&gt;
| 224&lt;br /&gt;
| 64k&lt;br /&gt;
| 48k&lt;br /&gt;
| 32k&lt;br /&gt;
| 32&lt;br /&gt;
| 1024&lt;br /&gt;
| 2G&lt;br /&gt;
| 512b&lt;br /&gt;
| 1.35GHz&lt;br /&gt;
| 2x&lt;br /&gt;
| No&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
! COLSPAN=&amp;quot;15&amp;quot; style=&amp;quot;background:#ffdead;&amp;quot; | Compute capability 2.0&lt;br /&gt;
|-&lt;br /&gt;
| GeForce GTX 580&lt;br /&gt;
| 1.5GB&lt;br /&gt;
| 16&lt;br /&gt;
| 512&lt;br /&gt;
| 1536&lt;br /&gt;
|&lt;br /&gt;
|&lt;br /&gt;
|&lt;br /&gt;
| 32&lt;br /&gt;
| 1024&lt;br /&gt;
|&lt;br /&gt;
|&lt;br /&gt;
|&lt;br /&gt;
| No&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| Tesla C2050 (*CB)&lt;br /&gt;
| 3GB&lt;br /&gt;
| 14&lt;br /&gt;
| 448&lt;br /&gt;
| 64k&lt;br /&gt;
| 48k&lt;br /&gt;
| 32k&lt;br /&gt;
| 32&lt;br /&gt;
| 1024&lt;br /&gt;
| 2G&lt;br /&gt;
| 512b&lt;br /&gt;
| 1.15GHz&lt;br /&gt;
| 2x&lt;br /&gt;
| No&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| Tesla C2070 (*CB)&lt;br /&gt;
| 6GB&lt;br /&gt;
| 14&lt;br /&gt;
| 448&lt;br /&gt;
| 64k&lt;br /&gt;
| 48k&lt;br /&gt;
| 32k&lt;br /&gt;
| 32&lt;br /&gt;
| 1024&lt;br /&gt;
| 2G&lt;br /&gt;
| 512b&lt;br /&gt;
| 1.15GHz&lt;br /&gt;
| 2x&lt;br /&gt;
| No&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| GeForce GTX 480&lt;br /&gt;
| 1536MB&lt;br /&gt;
| 15&lt;br /&gt;
| 480&lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
| GeForce GTX 470&lt;br /&gt;
| 1280MB&lt;br /&gt;
| 14&lt;br /&gt;
| 448&lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
| &lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
! COLSPAN=&amp;quot;15&amp;quot; style=&amp;quot;background:#efefef;&amp;quot; | Compute capability 1.3&lt;br /&gt;
|-&lt;br /&gt;
| Tesla C1060&lt;br /&gt;
| 4GB&lt;br /&gt;
| 30&lt;br /&gt;
| 240&lt;br /&gt;
| 65536b&lt;br /&gt;
| 16384b&lt;br /&gt;
| 16384&lt;br /&gt;
| 32&lt;br /&gt;
| 512&lt;br /&gt;
| 262144b&lt;br /&gt;
| 256b&lt;br /&gt;
| 1.30GHz&lt;br /&gt;
| Yes&lt;br /&gt;
| No&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| GeForce GTX 295&lt;br /&gt;
| 1GB&lt;br /&gt;
| 30&lt;br /&gt;
| 240&lt;br /&gt;
| 65536b&lt;br /&gt;
| 16384b&lt;br /&gt;
| 16384&lt;br /&gt;
| 32&lt;br /&gt;
| 512&lt;br /&gt;
| 262144b&lt;br /&gt;
| 256b&lt;br /&gt;
| 1.24GHz&lt;br /&gt;
| Yes&lt;br /&gt;
| No&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| GeForce GTX 285&lt;br /&gt;
| 1GB&lt;br /&gt;
| 30&lt;br /&gt;
| 240&lt;br /&gt;
| 65536b&lt;br /&gt;
| 16384b&lt;br /&gt;
| 16384&lt;br /&gt;
| 32&lt;br /&gt;
| 512&lt;br /&gt;
| 262144b&lt;br /&gt;
| 256b&lt;br /&gt;
| 1.48GHz&lt;br /&gt;
| Yes&lt;br /&gt;
| No&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| GeForce GTX 280&lt;br /&gt;
| 1GB&lt;br /&gt;
| 30&lt;br /&gt;
| 240&lt;br /&gt;
| 65536b&lt;br /&gt;
| 16384b&lt;br /&gt;
| 16384&lt;br /&gt;
| 32&lt;br /&gt;
| 512&lt;br /&gt;
| 262144b&lt;br /&gt;
| 256b&lt;br /&gt;
| 1.30GHz&lt;br /&gt;
| Yes&lt;br /&gt;
| No&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| GeForce GTX 260&lt;br /&gt;
| 1GB&lt;br /&gt;
| 27&lt;br /&gt;
| 216&lt;br /&gt;
| 65536b&lt;br /&gt;
| 16384b&lt;br /&gt;
| 16384&lt;br /&gt;
| 32&lt;br /&gt;
| 512&lt;br /&gt;
| 262144b&lt;br /&gt;
| 256b&lt;br /&gt;
| 1.47GHz&lt;br /&gt;
| Yes&lt;br /&gt;
| No&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
! COLSPAN=&amp;quot;15&amp;quot; style=&amp;quot;background:#efefef;&amp;quot; | Compute capability 1.2&lt;br /&gt;
|-&lt;br /&gt;
| GeForce GT 360M&lt;br /&gt;
| 1GB&lt;br /&gt;
| 12&lt;br /&gt;
| 96&lt;br /&gt;
| 65536b&lt;br /&gt;
| 16384b&lt;br /&gt;
| 16384&lt;br /&gt;
| 32&lt;br /&gt;
| 512&lt;br /&gt;
| 262144b&lt;br /&gt;
| 256b&lt;br /&gt;
| 1.32GHz&lt;br /&gt;
| Yes&lt;br /&gt;
| No&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| GeForce 310&lt;br /&gt;
| 512MB&lt;br /&gt;
| 2&lt;br /&gt;
| 16&lt;br /&gt;
| 65536b&lt;br /&gt;
| 16384b&lt;br /&gt;
| 16384&lt;br /&gt;
| 32&lt;br /&gt;
| 512&lt;br /&gt;
| 262144b&lt;br /&gt;
| 256b&lt;br /&gt;
| 1.40GHz&lt;br /&gt;
| Yes&lt;br /&gt;
| No&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| GeForce 240 GT&lt;br /&gt;
| 1GB&lt;br /&gt;
| 12&lt;br /&gt;
| 96&lt;br /&gt;
| 65536b&lt;br /&gt;
| 16384b&lt;br /&gt;
| 16384&lt;br /&gt;
| 32&lt;br /&gt;
| 512&lt;br /&gt;
| 262144b&lt;br /&gt;
| 256b&lt;br /&gt;
| 1.424GHz&lt;br /&gt;
| Yes&lt;br /&gt;
| No&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
! COLSPAN=&amp;quot;15&amp;quot; style=&amp;quot;background:#efefef;&amp;quot; | Compute capability 1.1&lt;br /&gt;
|-&lt;br /&gt;
| ION&lt;br /&gt;
| 256MB&lt;br /&gt;
| 2&lt;br /&gt;
| 16&lt;br /&gt;
| 65536b&lt;br /&gt;
| 16384b&lt;br /&gt;
| 8192&lt;br /&gt;
| 32&lt;br /&gt;
| 512&lt;br /&gt;
| 262144b&lt;br /&gt;
| 256b&lt;br /&gt;
| 1.1GHz&lt;br /&gt;
| No&lt;br /&gt;
| Yes&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| Quadro FX 570&lt;br /&gt;
| 256MB&lt;br /&gt;
| 2&lt;br /&gt;
| 16&lt;br /&gt;
| 65536b&lt;br /&gt;
| 16384b&lt;br /&gt;
| 8192&lt;br /&gt;
| 32&lt;br /&gt;
| 512&lt;br /&gt;
| 262144b&lt;br /&gt;
| 256b&lt;br /&gt;
| 0.92GHz&lt;br /&gt;
| Yes&lt;br /&gt;
| No&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| GeForce GTS 250 (*JR)&lt;br /&gt;
| 1G&lt;br /&gt;
| 16&lt;br /&gt;
| 128&lt;br /&gt;
| 65536b&lt;br /&gt;
| 16384b&lt;br /&gt;
| 8192&lt;br /&gt;
| 32&lt;br /&gt;
| 512&lt;br /&gt;
| 2147483647b (!)&lt;br /&gt;
| 256b&lt;br /&gt;
| 1.84GHz&lt;br /&gt;
| Yes&lt;br /&gt;
| No&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| GeForce 9800 GTX&lt;br /&gt;
| 512MB&lt;br /&gt;
| 16&lt;br /&gt;
| 128&lt;br /&gt;
| 65536b&lt;br /&gt;
| 16384b&lt;br /&gt;
| 8192&lt;br /&gt;
| 32&lt;br /&gt;
| 512&lt;br /&gt;
| 262144b&lt;br /&gt;
| 256b&lt;br /&gt;
| 1.67GHz&lt;br /&gt;
| Yes&lt;br /&gt;
| Yes&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| GeForce 9600 GT&lt;br /&gt;
| 512MB&lt;br /&gt;
| 8&lt;br /&gt;
| 64&lt;br /&gt;
| 65536b&lt;br /&gt;
| 16384b&lt;br /&gt;
| 8192&lt;br /&gt;
| 32&lt;br /&gt;
| 512&lt;br /&gt;
| 262144b&lt;br /&gt;
| 256b&lt;br /&gt;
| 1.62GHz,&lt;br /&gt;
1.50GHz&lt;br /&gt;
| Yes&lt;br /&gt;
| No&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| GeForce 9400M&lt;br /&gt;
| 256MB&lt;br /&gt;
| 2&lt;br /&gt;
| 16&lt;br /&gt;
| 65536b&lt;br /&gt;
| 16384b&lt;br /&gt;
| 8192&lt;br /&gt;
| 32&lt;br /&gt;
| 512&lt;br /&gt;
| 262144b&lt;br /&gt;
| 256b&lt;br /&gt;
| 0.88GHz&lt;br /&gt;
| No&lt;br /&gt;
| No&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| GeForce 8800 GTS 512&lt;br /&gt;
| 512MB&lt;br /&gt;
| 16&lt;br /&gt;
| 128&lt;br /&gt;
| 65536b&lt;br /&gt;
| 16384b&lt;br /&gt;
| 8192&lt;br /&gt;
| 32&lt;br /&gt;
| 512&lt;br /&gt;
| 262144b&lt;br /&gt;
| 256b&lt;br /&gt;
| 1.62GHz&lt;br /&gt;
| Yes&lt;br /&gt;
| No&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| GeForce 8600 GT&lt;br /&gt;
| 256MB&lt;br /&gt;
| 4&lt;br /&gt;
| 32&lt;br /&gt;
| 65536b&lt;br /&gt;
| 16384b&lt;br /&gt;
| 8192&lt;br /&gt;
| 32&lt;br /&gt;
| 512&lt;br /&gt;
| 262144b&lt;br /&gt;
| 256b&lt;br /&gt;
| 0.95GHz&lt;br /&gt;
| Yes&lt;br /&gt;
| No&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| GeForce 9400M&lt;br /&gt;
| 512MB&lt;br /&gt;
| 1&lt;br /&gt;
| 8&lt;br /&gt;
| 65536b&lt;br /&gt;
| 16384b&lt;br /&gt;
| 8192&lt;br /&gt;
| 32&lt;br /&gt;
| 512&lt;br /&gt;
| 262144b&lt;br /&gt;
| 256b&lt;br /&gt;
| 1.40GHz&lt;br /&gt;
| No&lt;br /&gt;
| No&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
(*CB) Thanks to Cameron Black for this submission!&lt;br /&gt;
(*JR) Thanks to Javier Ruiz for this submission!&lt;br /&gt;
&lt;br /&gt;
==See Also==&lt;br /&gt;
* The nouveau Wiki's [http://nouveau.freedesktop.org/wiki/CUDA CUDA page]&lt;br /&gt;
** [http://nouveau.freedesktop.org/wiki/HonzaHavlicek Honza Havlicek]'s guide to NVIDIA architecture&lt;br /&gt;
** [http://nouveau.freedesktop.org/wiki/ContextSwitching Context switching] and the PSWITCH instruction&lt;br /&gt;
* The [http://code.google.com/p/gpuocelot/ gpuocelot] project, hosted on Google Code.&lt;br /&gt;
* The NVIDIA [http://developer.nvidia.com/object/gpucomputing.html GPU Developer Zone]&lt;br /&gt;
* My [[CUBAR]] tools and reverse-engineered [[libcudest]]&lt;br /&gt;
[[CATEGORY: GPGPU]]&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Fonts</id>
		<title>Fonts</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Fonts"/>
				<updated>2012-05-07T08:59:56Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: Created page with &amp;quot;Fonts can be installed by copying the appropriate .otf or .ttf file to ~/.fonts. Some fonts worth checking out:  ==Inconsolata== * http://levien.com/type/myfonts/inconsolata.h...&amp;quot;&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;Fonts can be installed by copying the appropriate .otf or .ttf file to ~/.fonts. Some fonts worth checking out:&lt;br /&gt;
&lt;br /&gt;
==Inconsolata==&lt;br /&gt;
* http://levien.com/type/myfonts/inconsolata.html&lt;br /&gt;
* http://www.google.com/webfonts/specimen/Inconsolata&lt;br /&gt;
==Consolas==&lt;br /&gt;
* http://www.microsoft.com/en-us/download/details.aspx?id=17879&lt;br /&gt;
==Monaco==&lt;br /&gt;
* http://www.gringod.com/wp-upload/software/Fonts/Monaco_Linux.ttf&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Omphalos</id>
		<title>Omphalos</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Omphalos"/>
				<updated>2012-05-07T05:32:02Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;[[File:omphalos.png|right]]&lt;br /&gt;
[[File:omphalos-2011-12-01.jpg|thumb|right|Three omphalos processes, 2011-12-01]]&lt;br /&gt;
A tool for network enumeration, protection, observation and domination. Omphalos makes use of passive and active portscanning, DNS/DHCP/[[Zeroconf]] server interrogation, portknock detection, covert channel detection and establishment, ARP scanning, automatic WEP cracking, man-in-the-middling, and a whole host of other tricks. GPS integration? Oh yes. Coordination across multiple interfaces? Of course. Use of Linux's MMAP_RX_SOCKET and MMAP_TX_SOCKET? Wouldn't have it any other way. Userspace networking is made visible to the host via a [[TUN/TAP]] device. While designed as an offensive tool, omphalos has proven useful for network debugging and troubleshooting, as well as experimentation.&lt;br /&gt;
&lt;br /&gt;
'''The latest release is [http://dank.qemfd.net/src/omphalos/rel/current/ 0.99.0 (β)], released 2011-12-01.'''&lt;br /&gt;
&lt;br /&gt;
Omphalos is not a &amp;quot;''point-and-click''&amp;quot; tool so much as &amp;quot;''pull the pin''&amp;quot; or perhaps &amp;quot;''spray the area''&amp;quot;. Default behavior is to redirect and seize all traffic, attack weak cryptosystems, archive authentication materials, and learn everything that can be learned. Ideally, a tiny microprocessor would be paired with power and a network device, stealthily physically inserted into a network, and left there; &amp;lt;tt&amp;gt;omphalos&amp;lt;/tt&amp;gt; and [[Hackery#liburine|liburine]] would then combine to provide complete network dominance. I hope to combine network programming and high-performance computing to create a tool capable of much havoc.&lt;br /&gt;
&lt;br /&gt;
'''Omphalos: Because one layer is never enough.''' Code is hosted on [https://github.com/dankamongmen/omphalos GitHub]. Bugtracking is hosted on [http://dank.qemfd.net/bugzilla/buglist.cgi?cmdtype=runnamed&amp;amp;namedcmd=omphalos qemfd-bugzilla]. There's a mailing list at [http://groups.google.com/group/omphalos-dev Google Groups].&lt;br /&gt;
==Similar Tools==&lt;br /&gt;
* [http://www.thoughtcrime.org/software/sslsniff/ SSLSNIFF] from Thoughtcrime Labs&lt;br /&gt;
* [http://ettercap.sourceforge.net/ ettercap] by Alberto Ornaghi and Marco Valleri&lt;br /&gt;
* [http://www.nixgeneration.com/~jaime/netdiscover/ Netdiscover] by Jaime Peñalba&lt;br /&gt;
* [http://www.netresec.com/?page=NetworkMiner NetworkMiner] from NETRESEC AB&lt;br /&gt;
* [http://www.jdisc.com/ JDisc Discovery] from JDisc UG&lt;br /&gt;
* [http://www.lantopolog.com/ LanTopolog] by Yuriy Volokitin&lt;br /&gt;
* [http://code.google.com/p/mirandaupnptool/ Miranda] by Craig Heffner&lt;br /&gt;
===Countertools===&lt;br /&gt;
We want to defeat systems like:&lt;br /&gt;
* [http://arpon.sourceforge.net/ ArpON] by Andrea Di Pasquale et al&lt;br /&gt;
===Subsumed Tools===&lt;br /&gt;
Omphalos implements all or portions of the functionality of the following tools:&lt;br /&gt;
* [[Avahi]], the linux [[zeroconf]] daemon&lt;br /&gt;
* [http://www.litech.org/radvd/ radvd], the linux IPv6 Router Advertisement daemon&lt;br /&gt;
&lt;br /&gt;
==Versions/Milestones/Releases==&lt;br /&gt;
{| border=&amp;quot;1&amp;quot; class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Version&lt;br /&gt;
! Release date&lt;br /&gt;
! Features&lt;br /&gt;
|-&lt;br /&gt;
|0.98 (initial alpha)&lt;br /&gt;
|'''[https://github.com/dankamongmen/omphalos/tree/v0.98alpha 2011-10-07]''' (actual)&lt;br /&gt;
2011-09-23 (planned)&lt;br /&gt;
|&lt;br /&gt;
*Detection of network entities at layers 2 and 3.&lt;br /&gt;
*Dynamic handling of devices, routes, neighbors and addresses&lt;br /&gt;
*Full [[netlink]], ethtool, nl80211 and wireless extensions support&lt;br /&gt;
*TTY and [[ncurses]]-based UI's&lt;br /&gt;
*[[ARP]]- and [[DNS]]-based probing&lt;br /&gt;
|-&lt;br /&gt;
|0.99.0β (initial beta)&lt;br /&gt;
|'''[https://github.com/dankamongmen/omphalos/tree/v0.99.0β 2011-12-01]''' (actual)&lt;br /&gt;
2011-11-11 (planned)&lt;br /&gt;
|&lt;br /&gt;
*Routing/iptables configuration capabilities&lt;br /&gt;
*Hostapd and AP-spoofing support&lt;br /&gt;
*Spoofing support at layers 2 and 3&lt;br /&gt;
*[[Zeroconf]]- and WINS-based probing&lt;br /&gt;
|-&lt;br /&gt;
|1.0&lt;br /&gt;
|2011-12-25 (planned)&lt;br /&gt;
|&lt;br /&gt;
*Automated selection and execution of previous capabilities&lt;br /&gt;
*GPS support&lt;br /&gt;
*Logging support&lt;br /&gt;
*[[Topology Discovery|LLTD]] and some [[NetBIOS]] support&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
==General Features==&lt;br /&gt;
Some planned, some implemented...&lt;br /&gt;
* Modes of operation governing automatic behavior, from &amp;quot;Silent&amp;quot; to &amp;quot;Hostile&amp;quot;:&lt;br /&gt;
{| border=&amp;quot;1&amp;quot; class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Mode&lt;br /&gt;
! Summary&lt;br /&gt;
! Operating characteristics&lt;br /&gt;
|-&lt;br /&gt;
| Silent&lt;br /&gt;
| Take no actions, only watch.&lt;br /&gt;
|&lt;br /&gt;
* TX ringbuffers/sockets are not automatically created&lt;br /&gt;
* No packets will be issued by omphalos unless requested&lt;br /&gt;
* No automatic modifications to host networking state&lt;br /&gt;
|-&lt;br /&gt;
| Stealthy&lt;br /&gt;
| Take only the actions of a normally-configured host. &lt;br /&gt;
|&lt;br /&gt;
* [[ARP]] queries will be automatically issued&lt;br /&gt;
* [[DNS]] and [[Zeroconf]] queries will be issued, but only as the host is configured&lt;br /&gt;
* No automatic modifications to host networking state&lt;br /&gt;
|-&lt;br /&gt;
| Active&lt;br /&gt;
| Learn what we can, possibly standing out from the crowd.&lt;br /&gt;
|&lt;br /&gt;
* Make free use of detected information for further recon&lt;br /&gt;
* No automatic modifications to host networking state&lt;br /&gt;
|-&lt;br /&gt;
| Aggressive&lt;br /&gt;
| Learn things quickly, in ways that will be noticed.&lt;br /&gt;
|&lt;br /&gt;
* &amp;quot;Active&amp;quot;, plus...&lt;br /&gt;
* Periodic and triggered wide-spectrum active scanning&lt;br /&gt;
* Omphalos will freely manipulate host networking state&lt;br /&gt;
|-&lt;br /&gt;
| Forceful&lt;br /&gt;
| Actively disrupt the network, rerouting traffic through us.&lt;br /&gt;
|&lt;br /&gt;
* Continuous scanning of the network&lt;br /&gt;
* MitM automatically effected wherever possible&lt;br /&gt;
* DoS will be employed to make MitM more effective&lt;br /&gt;
* Omphalos will freely manipulate host networking state&lt;br /&gt;
|-&lt;br /&gt;
| Hostile&lt;br /&gt;
| Attempt to make the network unusable.&lt;br /&gt;
|&lt;br /&gt;
* Same as &amp;quot;Forceful&amp;quot;, but don't pass traffic along once MitM'd.&lt;br /&gt;
* Actively employ null routing.&lt;br /&gt;
* DoS employed upon network infrastructure, carrier, and and egress.&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
* GPS coordination and tagging&lt;br /&gt;
* Fully dynamic behavior viz the networking stack. Add and remove cards, routes, addresses...&lt;br /&gt;
* Audiovisual plugins ('''FIXME''' detail! lots of good ideas here)&lt;br /&gt;
* Event/scripting engine&lt;br /&gt;
** Fine-grained MitM packet manipulation, filtering and generation via [[Hackery#parvenu|Parvenu]] and domain-specific languages&lt;br /&gt;
** Fine-grained, one-click identity theft at any desired layer(s) (assumption of MAC, IP, cookies, etc)&lt;br /&gt;
*** Eat your heart out, [http://codebutler.com/firesheep Firesheep]!&lt;br /&gt;
* Full integration with [[Linux_APIs#POSIX_capabilities|POSIX capabilities]] for fine-grained security (nothing runs as the superuser)&lt;br /&gt;
* Covert channel detection at all layers via [[Hackery#Zetetic|Zetetic]]&lt;br /&gt;
* Opportunistic, secure remote control via [[Hackery#liburine|liburine]]&lt;br /&gt;
===Network Analysis===&lt;br /&gt;
* Network analysis and debugging ought be spun out into [[Hackery#drbenway|Dr. Benway]]&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
! Layer&lt;br /&gt;
! Subdivisions&lt;br /&gt;
! What's tracked&lt;br /&gt;
! Notes&lt;br /&gt;
|-&lt;br /&gt;
| Layer 2&lt;br /&gt;
| From both packets and netlink:&lt;br /&gt;
* VLANs&lt;br /&gt;
* ESSs&lt;br /&gt;
|&lt;br /&gt;
* Nodes from packets:&lt;br /&gt;
** All source hardware addresses seen in packets&lt;br /&gt;
** All destination hardware multicast addresses&lt;br /&gt;
* Nodes from netlink:&lt;br /&gt;
** All hardware addresses in the kernel neighbor cache&lt;br /&gt;
** Our hardware addresses&lt;br /&gt;
** Hardware broadcast addresses&lt;br /&gt;
|&lt;br /&gt;
* Node allocation is backed by a mainly-static [[VLHU]]&lt;br /&gt;
** At the point an attacker can overwhelm our VLHU, there's effectively nothing on the network but junk packets.&lt;br /&gt;
* If something's a source, it's being claimed as present here on the network. A destination means nothing, except in the case of multicast.&lt;br /&gt;
* Someone else sending with our MAC address ought be noted, unless we stole their MAC address&lt;br /&gt;
* We can't generally differentiate between two other physical hosts using the same MAC&lt;br /&gt;
** Multiple interfaces might actually be sharing a MAC intentionally for low-latency failover&lt;br /&gt;
** Upshot: we don't/can't care. We only care if someone else uses *our* MAC (unless told it's ok).&lt;br /&gt;
* We can't detect a spoofed MAC, but we can send our own ARP probes and at least determine whether the MAC's being serviced&lt;br /&gt;
|-&lt;br /&gt;
| Layer 3&lt;br /&gt;
| From both packets and netlink:&lt;br /&gt;
* Networks&lt;br /&gt;
|&lt;br /&gt;
We don't want to track network addresses beyond our broadcast domain. That's difficult to determine, however, without a working routing configuration (ie, an address). We'll thus assume that RFC1918 membership or service of an L2-restricted service (like [[DHCP]] or [[Zeroconf]]) indicates local presence (if it doesn't, it indicates misconfiguration). This means that &lt;br /&gt;
* Hosts from netlink:&lt;br /&gt;
** All network addresses in the kernel neighbor cache&lt;br /&gt;
** Configured router addresses&lt;br /&gt;
** Our configured network addresses&lt;br /&gt;
** Configured broadcast addresses&lt;br /&gt;
* Hosts from packets:&lt;br /&gt;
** All source network addresses from the RFC1918 networks&lt;br /&gt;
** All source network addresses to which we have a configured route&lt;br /&gt;
** All source network addresses observed offering L2-restricted services&lt;br /&gt;
*** All routers and nameservers named in a DHCP packet&lt;br /&gt;
** All destination network multicast addresses&lt;br /&gt;
|&lt;br /&gt;
* Host allocation is backed by a dynamic [[VLHU]].&lt;br /&gt;
* More dynamic and larger VLHU than that for layer 2, since we can have more hosts than nodes -- imagine a /0 route configuration sitting on an internet backbone. Small implementations of ARP tables and CAMs in nodes/switches means, say, 4k nodes ought almost always be sufficient for any interface.&lt;br /&gt;
* Multiple nodes can share a host address, but it can also indicate a problem&lt;br /&gt;
* Other nodes using *our* host addresses is a problem unless told otherwise&lt;br /&gt;
* Seeing an L3 address on a MAC means either:&lt;br /&gt;
** There's another network present locally (if we have no route to the L3, and the MAC responds to an [[ARP]] query for the L3), or&lt;br /&gt;
** That MAC is routing to that address (if the MAC is associated with a route to the L3), or&lt;br /&gt;
** That MAC serves that address (if we have a local route to the address)&lt;br /&gt;
*** Perhaps only temporarily, and perhaps without service provision (eg DHCP requests), or&lt;br /&gt;
** There's any variety of misconfiguration/failure/adversary at work (le sigh)&lt;br /&gt;
* Upshot: we can discover the local network(s) without relying on any configuration, even those which don't advertise (ie with [[DHCP]])&lt;br /&gt;
|-&lt;br /&gt;
| Layer 4&lt;br /&gt;
|&lt;br /&gt;
| From packets:&lt;br /&gt;
* DNS and DHCP servers&lt;br /&gt;
| We don't use the local configuration because there's no unified API to access it, nor track changes to it. We'll detect DNS quickly enough if anything's actually using the network, and can partially detect host DNS servers simply by kicking off a query through the standard resolver library (even if we don't use the provided result).&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
==Analysis and Attack Capabilities==&lt;br /&gt;
===Physical Layer Support===&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
! Protocol&lt;br /&gt;
! [[Standards|Standard]]&lt;br /&gt;
! [[Pcap|libpcap]] linktype&lt;br /&gt;
! Linux ARP type&lt;br /&gt;
! Analyzed?&lt;br /&gt;
|-&lt;br /&gt;
| BSD Loopback&lt;br /&gt;
| ?&lt;br /&gt;
| DLT_NULL&lt;br /&gt;
| N/A&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| Linux Cooked Capture&lt;br /&gt;
| [http://linuxmanpages.com/man7/packet.7.php packet(7)]&lt;br /&gt;
| DLT_LINUX_SLL&lt;br /&gt;
| N/A&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| [[Ethernet]]&lt;br /&gt;
* Ethernet II/DIX&lt;br /&gt;
* Novell 802.3&lt;br /&gt;
* IEEE 802.2 LLC&lt;br /&gt;
* SNAP&lt;br /&gt;
* 802.1Q VLAN/802.1p QoS (IEEE 802.3ac)&lt;br /&gt;
| IEEE 802.3-2008&lt;br /&gt;
| DLT_EN10MB&lt;br /&gt;
| ARPHRD_ETHER&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| Token Ring&lt;br /&gt;
| IEEE 802.5&lt;br /&gt;
| DLT_IEEE802&lt;br /&gt;
| ARPHRD_IEEE802_TR&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| ARCNET&lt;br /&gt;
| ANSI 878.1&lt;br /&gt;
|&lt;br /&gt;
* DLT_ARCNET&lt;br /&gt;
* DLT_ARCNET_LINUX&lt;br /&gt;
| ARPHRD_ARCNET&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| SLIP&lt;br /&gt;
(Serial Line Internet Protocol)&lt;br /&gt;
|&lt;br /&gt;
* RFC 1055 (SLIP)&lt;br /&gt;
* RFC 1154 (CSLIP)&lt;br /&gt;
| DLT_SLIP&lt;br /&gt;
|&lt;br /&gt;
* ARPHRD_SLIP&lt;br /&gt;
* ARPHRD_SLIP6&lt;br /&gt;
* ARPHRD_CSLIP&lt;br /&gt;
* ARPHRD_CSLIP6&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| PPP (Point-to-Point Protocol)&lt;br /&gt;
* BSD/OS PPP&lt;br /&gt;
* PPP over serial&lt;br /&gt;
* PPPoE (PPP over [[Ethernet]])&lt;br /&gt;
* PPPoA (PPP over ATM)&lt;br /&gt;
* Cisco PPP/HDLC&lt;br /&gt;
| RFC 1661&lt;br /&gt;
* ?&lt;br /&gt;
* RFC 1662&lt;br /&gt;
* RFC 2516&lt;br /&gt;
* RFC 2364&lt;br /&gt;
* RFC 1547&lt;br /&gt;
| DLT_PPP&lt;br /&gt;
* DLT_PPP_BSDOS&lt;br /&gt;
* DLT_PPP_SERIAL&lt;br /&gt;
* DLT_PPP_ETHER&lt;br /&gt;
* ?&lt;br /&gt;
* DLT_C_HDLC&lt;br /&gt;
| ARPHRD_PPP&lt;br /&gt;
| Partial&lt;br /&gt;
* No&lt;br /&gt;
* No&lt;br /&gt;
* No&lt;br /&gt;
* No&lt;br /&gt;
* Yes&lt;br /&gt;
|-&lt;br /&gt;
| FDDI&lt;br /&gt;
(Fiber Distributed Data Interface)&lt;br /&gt;
|&lt;br /&gt;
* MAC: ANSI X3.139-1987 / ISO 9314-2&lt;br /&gt;
* PHY: ANSI X3.148-1988 / ISO 9314-1&lt;br /&gt;
| DLT_FDDI&lt;br /&gt;
| ARPHRD_FDDI&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| Fibre Channel&lt;br /&gt;
| RFC 2625&lt;br /&gt;
| DLT_IP_OVER_FC&lt;br /&gt;
|&lt;br /&gt;
* ARPHRD_FCPP&lt;br /&gt;
* ARPHRD_FCAL&lt;br /&gt;
* ARPHRD_FCPL&lt;br /&gt;
* ARPHRD_FCFABRIC&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| IrDA&lt;br /&gt;
(Infrared Data Association)&lt;br /&gt;
|&lt;br /&gt;
* IrDA PHY Spec v1.5&lt;br /&gt;
* IrDA Link Access Protocol v1.1&lt;br /&gt;
| DLT_LINUX_IRDA&lt;br /&gt;
| ARPHRD_IRDA&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| Radiotap&lt;br /&gt;
| De facto&lt;br /&gt;
| DLT_IEEE802_11_RADIO&lt;br /&gt;
| ARPHRD_IEEE80211_RADIOTAP&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| Firewire&lt;br /&gt;
| IEEE 1394&lt;br /&gt;
| N/A&lt;br /&gt;
| ARPHRD_IEEE1394&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| Frame Relay&lt;br /&gt;
| ?&lt;br /&gt;
| DLT_FRELAY&lt;br /&gt;
| ARPHRD_FRAD&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| Apple LocalTalk&lt;br /&gt;
| ?&lt;br /&gt;
| DLT_LTALK&lt;br /&gt;
| ARPHRD_APPLETLK&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| LAPD&lt;br /&gt;
(Link Access Protocol - D Channel)&lt;br /&gt;
| ITU Q.921&lt;br /&gt;
| DLT_LINUX_LAPD&lt;br /&gt;
| ARPHRD_LAPB&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
===Layer 2===&lt;br /&gt;
====Topology Discovery====&lt;br /&gt;
''For more information, see the [[Topology Discovery]] page.''&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
! Protocol&lt;br /&gt;
! Standard&lt;br /&gt;
! Support&lt;br /&gt;
|-&lt;br /&gt;
| [[Topology_Discovery#Link-Local_Topology_Discovery_.28LLTD.29_Protocol|LLTDP]]&lt;br /&gt;
| Microsoft&lt;br /&gt;
|&lt;br /&gt;
* Extraction of data from HELLO packets&lt;br /&gt;
* Enumeration via DISCOVERY requests&lt;br /&gt;
|-&lt;br /&gt;
| [[Topology_Discovery#Link-Layer_Discovery_Protocol_.28LLDP.29|LLDP]]&lt;br /&gt;
| IEEE 802.1AB-2005&lt;br /&gt;
|&lt;br /&gt;
* None yet&lt;br /&gt;
|-&lt;br /&gt;
| [[Topology_Discovery#Cisco_Discovery_Protocol_.28CDP.29|CDP]]&lt;br /&gt;
| Cisco&lt;br /&gt;
|&lt;br /&gt;
* None yet&lt;br /&gt;
|-&lt;br /&gt;
| STP&lt;br /&gt;
| IEEE 802.1D&lt;br /&gt;
|&lt;br /&gt;
* Minimal analysis of BDPUs&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
====802.3/Ethernet II====&lt;br /&gt;
* Detect physical hosts on the network via MAC analysis&lt;br /&gt;
** Classify as locally-generated, multicast, etc&lt;br /&gt;
* Flood a network with spoofed MAC addresses, in the hope of forcing fail-open behavior to facilitate attacks (see &amp;lt;tt&amp;gt;macof&amp;lt;/tt&amp;gt; from [http://monkey.org/~dugsong/dsniff/ dsniff] and ''Hacking Layer 2: Fun with Ethernet Switches'' from BlackHat 2002)&lt;br /&gt;
* Probe and autodetect CAM sizes and hash functions, allowing for minimal CAM overflows&lt;br /&gt;
* Autodetect host [[ARP]] timings and replacement policies, allowing for stealthy man-in-the-middling&lt;br /&gt;
* Reverse and direct man-in-the-middling (answer all queries for an address, from an address, or both)&lt;br /&gt;
* Gratuitous ARP (&amp;quot;enclosure&amp;quot;)&lt;br /&gt;
* Controlled SNAT of outgoing traffic at layer 2, to create multiple realistic hosts (&amp;quot;Capgras delusions&amp;quot;)&lt;br /&gt;
* Automated [[ARP]] jamming and man-in-the-middling&lt;br /&gt;
* [http://en.wikipedia.org/wiki/Arpwatch Arpwatch-like] layer 2 monitoring&lt;br /&gt;
* VLAN hopping&lt;br /&gt;
&lt;br /&gt;
====802.11====&lt;br /&gt;
* Passively attack weak cryptosystems (especially WEP), or do so actively if configured&lt;br /&gt;
* Channel hopping or locked operation&lt;br /&gt;
* Spectrum and noise analysis plugin&lt;br /&gt;
* Respond as master to probed networks, on a to-order basis&lt;br /&gt;
* Ability to run omphalos in as an AP client via userspace networking atop radiotap (Monitor mode) and WPA/EAPOL support&lt;br /&gt;
** Or, more likely, some kind of hostapd control using Master mode&lt;br /&gt;
* &amp;quot;[http://www.airtightnetworks.com/WPA2-Hole196 Hole 196]&amp;quot; injection&lt;br /&gt;
* Viehbock's [http://sviehb.files.wordpress.com/2011/12/viehboeck_wps.pdf WPS EAP-NACK] brute-force attack ([http://www.kb.cert.org/vuls/id/723755 US-CERT #723755])&lt;br /&gt;
&lt;br /&gt;
===Layer 3===&lt;br /&gt;
* ICMP redirects&lt;br /&gt;
** We're closer than the remote server; jam ours in, and let the real one be tossed as duplicate&lt;br /&gt;
* A whole world of IPv6 mischief&lt;br /&gt;
* Rogue DHCP service&lt;br /&gt;
* SNAT for routing enbondaged neighbors&lt;br /&gt;
* ...much more&lt;br /&gt;
&lt;br /&gt;
===Layer 4===&lt;br /&gt;
* TCP assassination (via RST) / arbitrary corruption&lt;br /&gt;
** Most [[TCP]] implementations will (usually) deliver the first bytes received for a given window&lt;br /&gt;
* UDP assassination (via ICMP) / insertion&lt;br /&gt;
* Cryptographic downgrade attacks on HTTPS etc&lt;br /&gt;
===Layer 5===&lt;br /&gt;
* FireSheep- and BEAST-like session hijacking&lt;br /&gt;
* Progressive user identity/demographic discovery aka &amp;quot;maximum creepy&amp;quot; (heuristics on machine name, web pages visited, accounts revealed, mails sent etc)&lt;br /&gt;
** Watch for and aggregate probed wireless networks, DHCP lease renewals, etc&lt;br /&gt;
* Rogue DNS service&lt;br /&gt;
* File-and-signature association for insecure checksums + csums updated-to-order&lt;br /&gt;
&lt;br /&gt;
==Portability==&lt;br /&gt;
Omphalos currently only runs or indeed builds on fairly recent Linux systems, due to extensive use of advanced capabilities of the Linux networking stack (and the small fact that I don't run anything else). I doubt that I would accept patches to add Windows/MacOSX support, but you're certainly welcome to maintain them yourself. Once the main functionality set is complete (0.98 release), I'll add support for falling back to plain old PF_PACKET sockets without ringbuffers; that ought add support for any UNIX-based OS with a basic &amp;lt;tt&amp;gt;rtnetlink&amp;lt;/tt&amp;gt; implementation.&lt;br /&gt;
===User Interfaces===&lt;br /&gt;
* &amp;lt;tt&amp;gt;omphalos-tty&amp;lt;/tt&amp;gt;: line-based console output with readline-based input&lt;br /&gt;
* &amp;lt;tt&amp;gt;omphalos-ncurses&amp;lt;/tt&amp;gt;: screen-based terminal output with ncurses-based input&lt;br /&gt;
* GTK: I'd like to add a GTK UI, but it's not a major priority&lt;br /&gt;
** If you'd like to contribute freely-licensed, original artwork to this effort, please contact me!&lt;br /&gt;
* WxWidgets, QT: Dubious that I'll add one, but I'd take patches.&lt;br /&gt;
* Java: nope&lt;br /&gt;
==Project documentation==&lt;br /&gt;
Transcluded from top of my git repository at GitHub.&lt;br /&gt;
===README===&lt;br /&gt;
&amp;lt;include src=&amp;quot;https://raw.github.com/dankamongmen/omphalos/master/README&amp;quot; /&amp;gt;&lt;br /&gt;
&lt;br /&gt;
===Data Organization===&lt;br /&gt;
&amp;lt;include src=&amp;quot;https://raw.github.com/dankamongmen/omphalos/master/doc/dataorganization.txt&amp;quot; /&amp;gt;&lt;br /&gt;
&lt;br /&gt;
----&lt;br /&gt;
&amp;lt;blockquote&amp;gt;''One of her sisterhood lugged me squealing into life. Creation from nothing. What has she in the bag? A misbirth with a trailing navelcord, hushed in ruddy wool. The cords of all link back, strandentwining cable of all flesh. That is why mystic monks. Will you be as gods? Gaze in your omphalos.'' -- James Joyce, ''[http://www.doc.ic.ac.uk/~rac101/concord/texts/ulysses/files/ulysses3.html Ulysses]''&amp;lt;/blockquote&amp;gt;&lt;br /&gt;
&amp;lt;hr&amp;gt;&lt;br /&gt;
==See Also==&lt;br /&gt;
* [[Packet sockets]]&lt;br /&gt;
&lt;br /&gt;
[[CATEGORY: Projects]]&lt;br /&gt;
[[CATEGORY: Networking]]&lt;br /&gt;
[[CATEGORY: Offensive Computing]]&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/File:Omphalos.png</id>
		<title>File:Omphalos.png</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/File:Omphalos.png"/>
				<updated>2012-05-07T05:31:43Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: Omphalos: Network Dominance.&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;Omphalos: Network Dominance.&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Omphalos</id>
		<title>Omphalos</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Omphalos"/>
				<updated>2012-05-07T05:31:29Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;[[File:omphalos.png]]&lt;br /&gt;
[[File:omphalos-2011-12-01.jpg|thumb|right|Three omphalos processes, 2011-12-01]]&lt;br /&gt;
A tool for network enumeration, protection, observation and domination. Omphalos makes use of passive and active portscanning, DNS/DHCP/[[Zeroconf]] server interrogation, portknock detection, covert channel detection and establishment, ARP scanning, automatic WEP cracking, man-in-the-middling, and a whole host of other tricks. GPS integration? Oh yes. Coordination across multiple interfaces? Of course. Use of Linux's MMAP_RX_SOCKET and MMAP_TX_SOCKET? Wouldn't have it any other way. Userspace networking is made visible to the host via a [[TUN/TAP]] device. While designed as an offensive tool, omphalos has proven useful for network debugging and troubleshooting, as well as experimentation.&lt;br /&gt;
&lt;br /&gt;
'''The latest release is [http://dank.qemfd.net/src/omphalos/rel/current/ 0.99.0 (β)], released 2011-12-01.'''&lt;br /&gt;
&lt;br /&gt;
Omphalos is not a &amp;quot;''point-and-click''&amp;quot; tool so much as &amp;quot;''pull the pin''&amp;quot; or perhaps &amp;quot;''spray the area''&amp;quot;. Default behavior is to redirect and seize all traffic, attack weak cryptosystems, archive authentication materials, and learn everything that can be learned. Ideally, a tiny microprocessor would be paired with power and a network device, stealthily physically inserted into a network, and left there; &amp;lt;tt&amp;gt;omphalos&amp;lt;/tt&amp;gt; and [[Hackery#liburine|liburine]] would then combine to provide complete network dominance. I hope to combine network programming and high-performance computing to create a tool capable of much havoc.&lt;br /&gt;
&lt;br /&gt;
'''Omphalos: Because one layer is never enough.''' Code is hosted on [https://github.com/dankamongmen/omphalos GitHub]. Bugtracking is hosted on [http://dank.qemfd.net/bugzilla/buglist.cgi?cmdtype=runnamed&amp;amp;namedcmd=omphalos qemfd-bugzilla]. There's a mailing list at [http://groups.google.com/group/omphalos-dev Google Groups].&lt;br /&gt;
==Similar Tools==&lt;br /&gt;
* [http://www.thoughtcrime.org/software/sslsniff/ SSLSNIFF] from Thoughtcrime Labs&lt;br /&gt;
* [http://ettercap.sourceforge.net/ ettercap] by Alberto Ornaghi and Marco Valleri&lt;br /&gt;
* [http://www.nixgeneration.com/~jaime/netdiscover/ Netdiscover] by Jaime Peñalba&lt;br /&gt;
* [http://www.netresec.com/?page=NetworkMiner NetworkMiner] from NETRESEC AB&lt;br /&gt;
* [http://www.jdisc.com/ JDisc Discovery] from JDisc UG&lt;br /&gt;
* [http://www.lantopolog.com/ LanTopolog] by Yuriy Volokitin&lt;br /&gt;
* [http://code.google.com/p/mirandaupnptool/ Miranda] by Craig Heffner&lt;br /&gt;
===Countertools===&lt;br /&gt;
We want to defeat systems like:&lt;br /&gt;
* [http://arpon.sourceforge.net/ ArpON] by Andrea Di Pasquale et al&lt;br /&gt;
===Subsumed Tools===&lt;br /&gt;
Omphalos implements all or portions of the functionality of the following tools:&lt;br /&gt;
* [[Avahi]], the linux [[zeroconf]] daemon&lt;br /&gt;
* [http://www.litech.org/radvd/ radvd], the linux IPv6 Router Advertisement daemon&lt;br /&gt;
&lt;br /&gt;
==Versions/Milestones/Releases==&lt;br /&gt;
{| border=&amp;quot;1&amp;quot; class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Version&lt;br /&gt;
! Release date&lt;br /&gt;
! Features&lt;br /&gt;
|-&lt;br /&gt;
|0.98 (initial alpha)&lt;br /&gt;
|'''[https://github.com/dankamongmen/omphalos/tree/v0.98alpha 2011-10-07]''' (actual)&lt;br /&gt;
2011-09-23 (planned)&lt;br /&gt;
|&lt;br /&gt;
*Detection of network entities at layers 2 and 3.&lt;br /&gt;
*Dynamic handling of devices, routes, neighbors and addresses&lt;br /&gt;
*Full [[netlink]], ethtool, nl80211 and wireless extensions support&lt;br /&gt;
*TTY and [[ncurses]]-based UI's&lt;br /&gt;
*[[ARP]]- and [[DNS]]-based probing&lt;br /&gt;
|-&lt;br /&gt;
|0.99.0β (initial beta)&lt;br /&gt;
|'''[https://github.com/dankamongmen/omphalos/tree/v0.99.0β 2011-12-01]''' (actual)&lt;br /&gt;
2011-11-11 (planned)&lt;br /&gt;
|&lt;br /&gt;
*Routing/iptables configuration capabilities&lt;br /&gt;
*Hostapd and AP-spoofing support&lt;br /&gt;
*Spoofing support at layers 2 and 3&lt;br /&gt;
*[[Zeroconf]]- and WINS-based probing&lt;br /&gt;
|-&lt;br /&gt;
|1.0&lt;br /&gt;
|2011-12-25 (planned)&lt;br /&gt;
|&lt;br /&gt;
*Automated selection and execution of previous capabilities&lt;br /&gt;
*GPS support&lt;br /&gt;
*Logging support&lt;br /&gt;
*[[Topology Discovery|LLTD]] and some [[NetBIOS]] support&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
==General Features==&lt;br /&gt;
Some planned, some implemented...&lt;br /&gt;
* Modes of operation governing automatic behavior, from &amp;quot;Silent&amp;quot; to &amp;quot;Hostile&amp;quot;:&lt;br /&gt;
{| border=&amp;quot;1&amp;quot; class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Mode&lt;br /&gt;
! Summary&lt;br /&gt;
! Operating characteristics&lt;br /&gt;
|-&lt;br /&gt;
| Silent&lt;br /&gt;
| Take no actions, only watch.&lt;br /&gt;
|&lt;br /&gt;
* TX ringbuffers/sockets are not automatically created&lt;br /&gt;
* No packets will be issued by omphalos unless requested&lt;br /&gt;
* No automatic modifications to host networking state&lt;br /&gt;
|-&lt;br /&gt;
| Stealthy&lt;br /&gt;
| Take only the actions of a normally-configured host. &lt;br /&gt;
|&lt;br /&gt;
* [[ARP]] queries will be automatically issued&lt;br /&gt;
* [[DNS]] and [[Zeroconf]] queries will be issued, but only as the host is configured&lt;br /&gt;
* No automatic modifications to host networking state&lt;br /&gt;
|-&lt;br /&gt;
| Active&lt;br /&gt;
| Learn what we can, possibly standing out from the crowd.&lt;br /&gt;
|&lt;br /&gt;
* Make free use of detected information for further recon&lt;br /&gt;
* No automatic modifications to host networking state&lt;br /&gt;
|-&lt;br /&gt;
| Aggressive&lt;br /&gt;
| Learn things quickly, in ways that will be noticed.&lt;br /&gt;
|&lt;br /&gt;
* &amp;quot;Active&amp;quot;, plus...&lt;br /&gt;
* Periodic and triggered wide-spectrum active scanning&lt;br /&gt;
* Omphalos will freely manipulate host networking state&lt;br /&gt;
|-&lt;br /&gt;
| Forceful&lt;br /&gt;
| Actively disrupt the network, rerouting traffic through us.&lt;br /&gt;
|&lt;br /&gt;
* Continuous scanning of the network&lt;br /&gt;
* MitM automatically effected wherever possible&lt;br /&gt;
* DoS will be employed to make MitM more effective&lt;br /&gt;
* Omphalos will freely manipulate host networking state&lt;br /&gt;
|-&lt;br /&gt;
| Hostile&lt;br /&gt;
| Attempt to make the network unusable.&lt;br /&gt;
|&lt;br /&gt;
* Same as &amp;quot;Forceful&amp;quot;, but don't pass traffic along once MitM'd.&lt;br /&gt;
* Actively employ null routing.&lt;br /&gt;
* DoS employed upon network infrastructure, carrier, and and egress.&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
* GPS coordination and tagging&lt;br /&gt;
* Fully dynamic behavior viz the networking stack. Add and remove cards, routes, addresses...&lt;br /&gt;
* Audiovisual plugins ('''FIXME''' detail! lots of good ideas here)&lt;br /&gt;
* Event/scripting engine&lt;br /&gt;
** Fine-grained MitM packet manipulation, filtering and generation via [[Hackery#parvenu|Parvenu]] and domain-specific languages&lt;br /&gt;
** Fine-grained, one-click identity theft at any desired layer(s) (assumption of MAC, IP, cookies, etc)&lt;br /&gt;
*** Eat your heart out, [http://codebutler.com/firesheep Firesheep]!&lt;br /&gt;
* Full integration with [[Linux_APIs#POSIX_capabilities|POSIX capabilities]] for fine-grained security (nothing runs as the superuser)&lt;br /&gt;
* Covert channel detection at all layers via [[Hackery#Zetetic|Zetetic]]&lt;br /&gt;
* Opportunistic, secure remote control via [[Hackery#liburine|liburine]]&lt;br /&gt;
===Network Analysis===&lt;br /&gt;
* Network analysis and debugging ought be spun out into [[Hackery#drbenway|Dr. Benway]]&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
! Layer&lt;br /&gt;
! Subdivisions&lt;br /&gt;
! What's tracked&lt;br /&gt;
! Notes&lt;br /&gt;
|-&lt;br /&gt;
| Layer 2&lt;br /&gt;
| From both packets and netlink:&lt;br /&gt;
* VLANs&lt;br /&gt;
* ESSs&lt;br /&gt;
|&lt;br /&gt;
* Nodes from packets:&lt;br /&gt;
** All source hardware addresses seen in packets&lt;br /&gt;
** All destination hardware multicast addresses&lt;br /&gt;
* Nodes from netlink:&lt;br /&gt;
** All hardware addresses in the kernel neighbor cache&lt;br /&gt;
** Our hardware addresses&lt;br /&gt;
** Hardware broadcast addresses&lt;br /&gt;
|&lt;br /&gt;
* Node allocation is backed by a mainly-static [[VLHU]]&lt;br /&gt;
** At the point an attacker can overwhelm our VLHU, there's effectively nothing on the network but junk packets.&lt;br /&gt;
* If something's a source, it's being claimed as present here on the network. A destination means nothing, except in the case of multicast.&lt;br /&gt;
* Someone else sending with our MAC address ought be noted, unless we stole their MAC address&lt;br /&gt;
* We can't generally differentiate between two other physical hosts using the same MAC&lt;br /&gt;
** Multiple interfaces might actually be sharing a MAC intentionally for low-latency failover&lt;br /&gt;
** Upshot: we don't/can't care. We only care if someone else uses *our* MAC (unless told it's ok).&lt;br /&gt;
* We can't detect a spoofed MAC, but we can send our own ARP probes and at least determine whether the MAC's being serviced&lt;br /&gt;
|-&lt;br /&gt;
| Layer 3&lt;br /&gt;
| From both packets and netlink:&lt;br /&gt;
* Networks&lt;br /&gt;
|&lt;br /&gt;
We don't want to track network addresses beyond our broadcast domain. That's difficult to determine, however, without a working routing configuration (ie, an address). We'll thus assume that RFC1918 membership or service of an L2-restricted service (like [[DHCP]] or [[Zeroconf]]) indicates local presence (if it doesn't, it indicates misconfiguration). This means that &lt;br /&gt;
* Hosts from netlink:&lt;br /&gt;
** All network addresses in the kernel neighbor cache&lt;br /&gt;
** Configured router addresses&lt;br /&gt;
** Our configured network addresses&lt;br /&gt;
** Configured broadcast addresses&lt;br /&gt;
* Hosts from packets:&lt;br /&gt;
** All source network addresses from the RFC1918 networks&lt;br /&gt;
** All source network addresses to which we have a configured route&lt;br /&gt;
** All source network addresses observed offering L2-restricted services&lt;br /&gt;
*** All routers and nameservers named in a DHCP packet&lt;br /&gt;
** All destination network multicast addresses&lt;br /&gt;
|&lt;br /&gt;
* Host allocation is backed by a dynamic [[VLHU]].&lt;br /&gt;
* More dynamic and larger VLHU than that for layer 2, since we can have more hosts than nodes -- imagine a /0 route configuration sitting on an internet backbone. Small implementations of ARP tables and CAMs in nodes/switches means, say, 4k nodes ought almost always be sufficient for any interface.&lt;br /&gt;
* Multiple nodes can share a host address, but it can also indicate a problem&lt;br /&gt;
* Other nodes using *our* host addresses is a problem unless told otherwise&lt;br /&gt;
* Seeing an L3 address on a MAC means either:&lt;br /&gt;
** There's another network present locally (if we have no route to the L3, and the MAC responds to an [[ARP]] query for the L3), or&lt;br /&gt;
** That MAC is routing to that address (if the MAC is associated with a route to the L3), or&lt;br /&gt;
** That MAC serves that address (if we have a local route to the address)&lt;br /&gt;
*** Perhaps only temporarily, and perhaps without service provision (eg DHCP requests), or&lt;br /&gt;
** There's any variety of misconfiguration/failure/adversary at work (le sigh)&lt;br /&gt;
* Upshot: we can discover the local network(s) without relying on any configuration, even those which don't advertise (ie with [[DHCP]])&lt;br /&gt;
|-&lt;br /&gt;
| Layer 4&lt;br /&gt;
|&lt;br /&gt;
| From packets:&lt;br /&gt;
* DNS and DHCP servers&lt;br /&gt;
| We don't use the local configuration because there's no unified API to access it, nor track changes to it. We'll detect DNS quickly enough if anything's actually using the network, and can partially detect host DNS servers simply by kicking off a query through the standard resolver library (even if we don't use the provided result).&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
==Analysis and Attack Capabilities==&lt;br /&gt;
===Physical Layer Support===&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
! Protocol&lt;br /&gt;
! [[Standards|Standard]]&lt;br /&gt;
! [[Pcap|libpcap]] linktype&lt;br /&gt;
! Linux ARP type&lt;br /&gt;
! Analyzed?&lt;br /&gt;
|-&lt;br /&gt;
| BSD Loopback&lt;br /&gt;
| ?&lt;br /&gt;
| DLT_NULL&lt;br /&gt;
| N/A&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| Linux Cooked Capture&lt;br /&gt;
| [http://linuxmanpages.com/man7/packet.7.php packet(7)]&lt;br /&gt;
| DLT_LINUX_SLL&lt;br /&gt;
| N/A&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| [[Ethernet]]&lt;br /&gt;
* Ethernet II/DIX&lt;br /&gt;
* Novell 802.3&lt;br /&gt;
* IEEE 802.2 LLC&lt;br /&gt;
* SNAP&lt;br /&gt;
* 802.1Q VLAN/802.1p QoS (IEEE 802.3ac)&lt;br /&gt;
| IEEE 802.3-2008&lt;br /&gt;
| DLT_EN10MB&lt;br /&gt;
| ARPHRD_ETHER&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| Token Ring&lt;br /&gt;
| IEEE 802.5&lt;br /&gt;
| DLT_IEEE802&lt;br /&gt;
| ARPHRD_IEEE802_TR&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| ARCNET&lt;br /&gt;
| ANSI 878.1&lt;br /&gt;
|&lt;br /&gt;
* DLT_ARCNET&lt;br /&gt;
* DLT_ARCNET_LINUX&lt;br /&gt;
| ARPHRD_ARCNET&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| SLIP&lt;br /&gt;
(Serial Line Internet Protocol)&lt;br /&gt;
|&lt;br /&gt;
* RFC 1055 (SLIP)&lt;br /&gt;
* RFC 1154 (CSLIP)&lt;br /&gt;
| DLT_SLIP&lt;br /&gt;
|&lt;br /&gt;
* ARPHRD_SLIP&lt;br /&gt;
* ARPHRD_SLIP6&lt;br /&gt;
* ARPHRD_CSLIP&lt;br /&gt;
* ARPHRD_CSLIP6&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| PPP (Point-to-Point Protocol)&lt;br /&gt;
* BSD/OS PPP&lt;br /&gt;
* PPP over serial&lt;br /&gt;
* PPPoE (PPP over [[Ethernet]])&lt;br /&gt;
* PPPoA (PPP over ATM)&lt;br /&gt;
* Cisco PPP/HDLC&lt;br /&gt;
| RFC 1661&lt;br /&gt;
* ?&lt;br /&gt;
* RFC 1662&lt;br /&gt;
* RFC 2516&lt;br /&gt;
* RFC 2364&lt;br /&gt;
* RFC 1547&lt;br /&gt;
| DLT_PPP&lt;br /&gt;
* DLT_PPP_BSDOS&lt;br /&gt;
* DLT_PPP_SERIAL&lt;br /&gt;
* DLT_PPP_ETHER&lt;br /&gt;
* ?&lt;br /&gt;
* DLT_C_HDLC&lt;br /&gt;
| ARPHRD_PPP&lt;br /&gt;
| Partial&lt;br /&gt;
* No&lt;br /&gt;
* No&lt;br /&gt;
* No&lt;br /&gt;
* No&lt;br /&gt;
* Yes&lt;br /&gt;
|-&lt;br /&gt;
| FDDI&lt;br /&gt;
(Fiber Distributed Data Interface)&lt;br /&gt;
|&lt;br /&gt;
* MAC: ANSI X3.139-1987 / ISO 9314-2&lt;br /&gt;
* PHY: ANSI X3.148-1988 / ISO 9314-1&lt;br /&gt;
| DLT_FDDI&lt;br /&gt;
| ARPHRD_FDDI&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| Fibre Channel&lt;br /&gt;
| RFC 2625&lt;br /&gt;
| DLT_IP_OVER_FC&lt;br /&gt;
|&lt;br /&gt;
* ARPHRD_FCPP&lt;br /&gt;
* ARPHRD_FCAL&lt;br /&gt;
* ARPHRD_FCPL&lt;br /&gt;
* ARPHRD_FCFABRIC&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| IrDA&lt;br /&gt;
(Infrared Data Association)&lt;br /&gt;
|&lt;br /&gt;
* IrDA PHY Spec v1.5&lt;br /&gt;
* IrDA Link Access Protocol v1.1&lt;br /&gt;
| DLT_LINUX_IRDA&lt;br /&gt;
| ARPHRD_IRDA&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| Radiotap&lt;br /&gt;
| De facto&lt;br /&gt;
| DLT_IEEE802_11_RADIO&lt;br /&gt;
| ARPHRD_IEEE80211_RADIOTAP&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| Firewire&lt;br /&gt;
| IEEE 1394&lt;br /&gt;
| N/A&lt;br /&gt;
| ARPHRD_IEEE1394&lt;br /&gt;
| Yes&lt;br /&gt;
|-&lt;br /&gt;
| Frame Relay&lt;br /&gt;
| ?&lt;br /&gt;
| DLT_FRELAY&lt;br /&gt;
| ARPHRD_FRAD&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| Apple LocalTalk&lt;br /&gt;
| ?&lt;br /&gt;
| DLT_LTALK&lt;br /&gt;
| ARPHRD_APPLETLK&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
| LAPD&lt;br /&gt;
(Link Access Protocol - D Channel)&lt;br /&gt;
| ITU Q.921&lt;br /&gt;
| DLT_LINUX_LAPD&lt;br /&gt;
| ARPHRD_LAPB&lt;br /&gt;
| No&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
===Layer 2===&lt;br /&gt;
====Topology Discovery====&lt;br /&gt;
''For more information, see the [[Topology Discovery]] page.''&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; border=&amp;quot;1&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
! Protocol&lt;br /&gt;
! Standard&lt;br /&gt;
! Support&lt;br /&gt;
|-&lt;br /&gt;
| [[Topology_Discovery#Link-Local_Topology_Discovery_.28LLTD.29_Protocol|LLTDP]]&lt;br /&gt;
| Microsoft&lt;br /&gt;
|&lt;br /&gt;
* Extraction of data from HELLO packets&lt;br /&gt;
* Enumeration via DISCOVERY requests&lt;br /&gt;
|-&lt;br /&gt;
| [[Topology_Discovery#Link-Layer_Discovery_Protocol_.28LLDP.29|LLDP]]&lt;br /&gt;
| IEEE 802.1AB-2005&lt;br /&gt;
|&lt;br /&gt;
* None yet&lt;br /&gt;
|-&lt;br /&gt;
| [[Topology_Discovery#Cisco_Discovery_Protocol_.28CDP.29|CDP]]&lt;br /&gt;
| Cisco&lt;br /&gt;
|&lt;br /&gt;
* None yet&lt;br /&gt;
|-&lt;br /&gt;
| STP&lt;br /&gt;
| IEEE 802.1D&lt;br /&gt;
|&lt;br /&gt;
* Minimal analysis of BDPUs&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
====802.3/Ethernet II====&lt;br /&gt;
* Detect physical hosts on the network via MAC analysis&lt;br /&gt;
** Classify as locally-generated, multicast, etc&lt;br /&gt;
* Flood a network with spoofed MAC addresses, in the hope of forcing fail-open behavior to facilitate attacks (see &amp;lt;tt&amp;gt;macof&amp;lt;/tt&amp;gt; from [http://monkey.org/~dugsong/dsniff/ dsniff] and ''Hacking Layer 2: Fun with Ethernet Switches'' from BlackHat 2002)&lt;br /&gt;
* Probe and autodetect CAM sizes and hash functions, allowing for minimal CAM overflows&lt;br /&gt;
* Autodetect host [[ARP]] timings and replacement policies, allowing for stealthy man-in-the-middling&lt;br /&gt;
* Reverse and direct man-in-the-middling (answer all queries for an address, from an address, or both)&lt;br /&gt;
* Gratuitous ARP (&amp;quot;enclosure&amp;quot;)&lt;br /&gt;
* Controlled SNAT of outgoing traffic at layer 2, to create multiple realistic hosts (&amp;quot;Capgras delusions&amp;quot;)&lt;br /&gt;
* Automated [[ARP]] jamming and man-in-the-middling&lt;br /&gt;
* [http://en.wikipedia.org/wiki/Arpwatch Arpwatch-like] layer 2 monitoring&lt;br /&gt;
* VLAN hopping&lt;br /&gt;
&lt;br /&gt;
====802.11====&lt;br /&gt;
* Passively attack weak cryptosystems (especially WEP), or do so actively if configured&lt;br /&gt;
* Channel hopping or locked operation&lt;br /&gt;
* Spectrum and noise analysis plugin&lt;br /&gt;
* Respond as master to probed networks, on a to-order basis&lt;br /&gt;
* Ability to run omphalos in as an AP client via userspace networking atop radiotap (Monitor mode) and WPA/EAPOL support&lt;br /&gt;
** Or, more likely, some kind of hostapd control using Master mode&lt;br /&gt;
* &amp;quot;[http://www.airtightnetworks.com/WPA2-Hole196 Hole 196]&amp;quot; injection&lt;br /&gt;
* Viehbock's [http://sviehb.files.wordpress.com/2011/12/viehboeck_wps.pdf WPS EAP-NACK] brute-force attack ([http://www.kb.cert.org/vuls/id/723755 US-CERT #723755])&lt;br /&gt;
&lt;br /&gt;
===Layer 3===&lt;br /&gt;
* ICMP redirects&lt;br /&gt;
** We're closer than the remote server; jam ours in, and let the real one be tossed as duplicate&lt;br /&gt;
* A whole world of IPv6 mischief&lt;br /&gt;
* Rogue DHCP service&lt;br /&gt;
* SNAT for routing enbondaged neighbors&lt;br /&gt;
* ...much more&lt;br /&gt;
&lt;br /&gt;
===Layer 4===&lt;br /&gt;
* TCP assassination (via RST) / arbitrary corruption&lt;br /&gt;
** Most [[TCP]] implementations will (usually) deliver the first bytes received for a given window&lt;br /&gt;
* UDP assassination (via ICMP) / insertion&lt;br /&gt;
* Cryptographic downgrade attacks on HTTPS etc&lt;br /&gt;
===Layer 5===&lt;br /&gt;
* FireSheep- and BEAST-like session hijacking&lt;br /&gt;
* Progressive user identity/demographic discovery aka &amp;quot;maximum creepy&amp;quot; (heuristics on machine name, web pages visited, accounts revealed, mails sent etc)&lt;br /&gt;
** Watch for and aggregate probed wireless networks, DHCP lease renewals, etc&lt;br /&gt;
* Rogue DNS service&lt;br /&gt;
* File-and-signature association for insecure checksums + csums updated-to-order&lt;br /&gt;
&lt;br /&gt;
==Portability==&lt;br /&gt;
Omphalos currently only runs or indeed builds on fairly recent Linux systems, due to extensive use of advanced capabilities of the Linux networking stack (and the small fact that I don't run anything else). I doubt that I would accept patches to add Windows/MacOSX support, but you're certainly welcome to maintain them yourself. Once the main functionality set is complete (0.98 release), I'll add support for falling back to plain old PF_PACKET sockets without ringbuffers; that ought add support for any UNIX-based OS with a basic &amp;lt;tt&amp;gt;rtnetlink&amp;lt;/tt&amp;gt; implementation.&lt;br /&gt;
===User Interfaces===&lt;br /&gt;
* &amp;lt;tt&amp;gt;omphalos-tty&amp;lt;/tt&amp;gt;: line-based console output with readline-based input&lt;br /&gt;
* &amp;lt;tt&amp;gt;omphalos-ncurses&amp;lt;/tt&amp;gt;: screen-based terminal output with ncurses-based input&lt;br /&gt;
* GTK: I'd like to add a GTK UI, but it's not a major priority&lt;br /&gt;
** If you'd like to contribute freely-licensed, original artwork to this effort, please contact me!&lt;br /&gt;
* WxWidgets, QT: Dubious that I'll add one, but I'd take patches.&lt;br /&gt;
* Java: nope&lt;br /&gt;
==Project documentation==&lt;br /&gt;
Transcluded from top of my git repository at GitHub.&lt;br /&gt;
===README===&lt;br /&gt;
&amp;lt;include src=&amp;quot;https://raw.github.com/dankamongmen/omphalos/master/README&amp;quot; /&amp;gt;&lt;br /&gt;
&lt;br /&gt;
===Data Organization===&lt;br /&gt;
&amp;lt;include src=&amp;quot;https://raw.github.com/dankamongmen/omphalos/master/doc/dataorganization.txt&amp;quot; /&amp;gt;&lt;br /&gt;
&lt;br /&gt;
----&lt;br /&gt;
&amp;lt;blockquote&amp;gt;''One of her sisterhood lugged me squealing into life. Creation from nothing. What has she in the bag? A misbirth with a trailing navelcord, hushed in ruddy wool. The cords of all link back, strandentwining cable of all flesh. That is why mystic monks. Will you be as gods? Gaze in your omphalos.'' -- James Joyce, ''[http://www.doc.ic.ac.uk/~rac101/concord/texts/ulysses/files/ulysses3.html Ulysses]''&amp;lt;/blockquote&amp;gt;&lt;br /&gt;
&amp;lt;hr&amp;gt;&lt;br /&gt;
==See Also==&lt;br /&gt;
* [[Packet sockets]]&lt;br /&gt;
&lt;br /&gt;
[[CATEGORY: Projects]]&lt;br /&gt;
[[CATEGORY: Networking]]&lt;br /&gt;
[[CATEGORY: Offensive Computing]]&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Solomonoff-Levin_distribution</id>
		<title>Solomonoff-Levin distribution</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Solomonoff-Levin_distribution"/>
				<updated>2012-05-04T11:00:22Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: Created page with &amp;quot;Category: Computer Science Eponyms&amp;quot;&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;[[Category: Computer Science Eponyms]]&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Cranfield_method</id>
		<title>Cranfield method</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Cranfield_method"/>
				<updated>2012-05-04T10:31:37Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: Created page with &amp;quot;A methodology for minimizing Boolean functions.  Category: Computer Science Eponyms&amp;quot;&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;A methodology for minimizing Boolean functions.&lt;br /&gt;
&lt;br /&gt;
[[Category: Computer Science Eponyms]]&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Zobrist_hashing</id>
		<title>Zobrist hashing</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Zobrist_hashing"/>
				<updated>2012-05-04T10:25:20Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: Created page with &amp;quot;Category: Computer Science Eponyms&amp;quot;&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;[[Category: Computer Science Eponyms]]&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Libdank</id>
		<title>Libdank</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Libdank"/>
				<updated>2012-05-01T05:25:01Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;&amp;lt;blockquote&amp;gt;A Real Programmer keeps his code locked up in a card file, because it implies that its owner cannot leave his important programs unguarded.&amp;lt;br&amp;gt;--[http://www.pbm.com/~lindahl/real.programmers.html Real Programmer's Don't Use Pascal]&amp;lt;/blockquote&amp;gt;&lt;br /&gt;
&amp;lt;blockquote&amp;gt;Why do programmers reinvent wheels? There are many reasons, reaching all the way from the narrowly technical to the psychology of programmers and the economics of the software production system. The damage from the endemic waste of programming time reaches all these levels as well.&amp;lt;br&amp;gt;--[http://www.faqs.org/docs/artu/ch16s01.html The Art of UNIX Programming]&amp;lt;/blockquote&amp;gt;&lt;br /&gt;
As innumerably many programming books report (I myself have no idea where I first read it), experienced programmers tend to carry with them a sizable selection of utility code they've built up over the years -- those general-use routines which just missed inclusion in the [[libc|standard libraries]] but don't justify an [[interesting libraries|external library]] by themselves. I too am guilty of a hubristic, eponymous extension to the [[ISO C99|C language]] -- libdank.&lt;br /&gt;
&lt;br /&gt;
==Resources==&lt;br /&gt;
* [https://github.com/dankamongmen/libdank/ git] on GitHub&lt;br /&gt;
* [http://www.bugzilla.org/ bugzilla], hosted here on http://dank.qemfd.net/bugzilla/&lt;br /&gt;
===Milestones===&lt;br /&gt;
[[Category: Projects]]&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/blackwiki:Community_Portal</id>
		<title>blackwiki:Community Portal</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/blackwiki:Community_Portal"/>
				<updated>2012-04-29T17:14:11Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: /* blackwiki news */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;There's pages about [http://dank.qemfd.net/dankwiki/index.php/blackwiki:About blackwiki] and [[User:Dank|myself]].&lt;br /&gt;
&lt;br /&gt;
I now offer consulting services through [http://www.sprezzaturacomputing.com sprezzatech] (a division of Sprezzatura Computing).&lt;br /&gt;
----&lt;br /&gt;
==blackwiki news==&lt;br /&gt;
* Upgraded from MediaWiki 1.18.1 to 1.18.3, moving from [[subversion]] to [[git]] as we did so [[User:Dank|Dank]] 17:14, 29 April 2012 (UTC)&lt;br /&gt;
* I have acquired an SSL certificate for dank.qemfd.net. Use it! https://dank.qemfd.net/dankwiki/index.php/Hack_on&lt;br /&gt;
* Upgraded to 1.18. A few things seem broken (why are we back on MonoBook?); fixing them up... [[User:Dank|Dank]] 19:56, 28 November 2011 (CST)&lt;br /&gt;
* Moved from the MonoBook to MediaWiki 1.17's new Vector skin. Very pretty! [[User:Dank|Dank]] 10:15, 22 November 2011 (CST)&lt;br /&gt;
* Apparently [http://www.mediawiki.org/wiki/Memcached memcached] support changed, and I didn't realize it. I've updated using the documentation at [http://www.mediawiki.org/wiki/Manual:$wgMainCacheType MediaWiki's cache page].&lt;br /&gt;
** Things ought be served noticeably faster now, hopefully. [[User:Dank|Dank]] 11:30, 1 October 2011 (CDT)&lt;br /&gt;
* Moved gplus, facebook and donation buttons from footer to sidebar. Pimp me, vigilant readers! [[User:Dank|Dank]] 23:08, 26 September 2011 (CDT)&lt;br /&gt;
* Fixed SphinxSearch and RSS [[User:Dank|Dank]] 07:00, 21 September 2011 (CDT)&lt;br /&gt;
* Upgraded to [[Special:Version|1.17.0]] [[User:Dank|Dank]] 15:49, 31 July 2011 (EDT)&lt;br /&gt;
* I have upgraded us from 1.15.1 to 1.16.5. Things look good. On to 1.17 in a few hours! [[User:Dank|Dank]] 18:26, 23 July 2011 (EDT)&lt;br /&gt;
** SphinxSearch is working again (see [http://dank.qemfd.net/bugzilla/show_bug.cgi?id=242 bug 242]), and upgraded to 2.0.2-dev-r2894&lt;br /&gt;
* I need [http://dank.qemfd.net/bugzilla/show_bug.cgi?id=242 update] this [http://dank.qemfd.net/bugzilla/show_bug.cgi?id=243 bitch] across two MediaWiki versions&lt;br /&gt;
** We'll be going from 1.15.1 to 1.17 very soon -- [[User:Dank|Dank]] 09:36, 19 July 2011 (UTC)&lt;br /&gt;
* fixed [http://www.mediawiki.org/wiki/Extension:Bugzilla_Reports BuzillaReports] for [[libtorque]] and [[omphalos]] - [[User:Dank|Dank]] 15:17, 6 July 2011 (UTC)&lt;br /&gt;
* I fixed Email::Simple's install, eliminating some bugzilla failures - [[User:Dank|Dank]] 03:24, 26 June 2011 (UTC)&lt;br /&gt;
* '''EXCITING NEWS!!!''' Blackwiki has moved from 1and1.com to Linode.&lt;br /&gt;
** Our connectivity is ''much'' better, as is the whole setup. '''Could this be the end of prolonged downtime?'''&lt;br /&gt;
** We're now running [[Debian|Debian Squeeze]] rather than some ghetto Ubuntu&lt;br /&gt;
** Look for an upgrade to MediaWiki 1.16.x soon!&lt;br /&gt;
* I fixed the [[Special:RecentChanges|Recent Changes]] page, which I fucked up during the 1.15.1 upgrade&lt;br /&gt;
** Needed to run update.php -- [http://www.mwusers.com/forums/showthread.php?11694-1.15.1-SQL-Error-on-recent-changes-page see this forum]. Stupid me!&lt;br /&gt;
* I've killed the cacti link as of 2011-05-14, because I fucked up cacti&lt;br /&gt;
* If you'd like to help fund blackwiki for some reason, please click on the &amp;quot;Donate&amp;quot; button on the footer of any blackwiki page.&lt;br /&gt;
* I've added Google AdSense as of 2010-07-24. Let's try this, players!&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Debian</id>
		<title>Debian</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Debian"/>
				<updated>2012-04-29T17:13:24Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;[[Image:Debianelitism.jpg|right|thumb|Would you like some fries with that elitism?]]&lt;br /&gt;
&lt;br /&gt;
It's the bees' knees. It's the wasps' nipples.&lt;br /&gt;
* Things I do to a new [[Debian Unstable|Unstable (sid) box]]&lt;br /&gt;
* [[Packages by Purpose]]&lt;br /&gt;
* My resolution this year is to file bugs in the [http://www.debian.org/Bugs/Reporting DBTS] more quickly and more often. Well, it isn't really, but I ought do so. Bugs filed thus far, and their resolutions:&lt;br /&gt;
** [http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=469601 #469601], '''nut-hal-drivers''' locks up on post-install&lt;br /&gt;
** [http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=469937 #469937], '''statsvn''' has problems with filenames containing spaces (''fixed upstream'', ''resolved'')&lt;br /&gt;
** [http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=471111 #471111], '''mpd''' isn't shut down properly&lt;br /&gt;
** [http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=509499 #509499], '''strace''' doesn't match [[Linux APIs|sendfile(2)]] properly (''provided patch'', ''resolved'')&lt;br /&gt;
** [http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=530154 #530154], '''bugz''' doesn't provide a man page&lt;br /&gt;
** [http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=533360 #533360], '''[[glibc|libc6]]''' 2.9-15 broke [[Linux APIs|signalfd]] creation with SFD_* flags (''resolved'')&lt;br /&gt;
** [http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=533362 #533362], '''ia32-libs''' uninstallable against [[glibc|libc6]] 2.9-15 (''resolved'')&lt;br /&gt;
** [http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=552260 #552260], '''kernel-package''' with &amp;lt;tt&amp;gt;install_vmlinux&amp;lt;/tt&amp;gt; set + grub2 == unbootable entries&lt;br /&gt;
** [http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=553298 #553298], '''libcpuset''' drops core if an empty [[Cpuset|cgroup/cpuset]] fs is mounted&lt;br /&gt;
** [http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=554901 #554901], '''[[glibc|eglibc]]''' is missing const casts in CPU_ISSET() (''provided patch'', ''resolved'')&lt;br /&gt;
* I'd also like to become a [https://nm.debian.org/nmlist.php Debian Developer]. ITP ideas:&lt;br /&gt;
** the [[SSHFP|sshfp]] program, maintained by [http://www.xelerance.com/software/sshfp/ Xelerance]&lt;br /&gt;
** Florian Amrhein's [http://amrhein.eu/newsportal/ newsportal] NNTP-to-HTTP gateway&lt;br /&gt;
** Rice University's [http://hpctoolkit.org/ HPCToolkit]&lt;br /&gt;
** HP+MIT's [http://groups.csail.mit.edu/cag/dynamorio/ DynamoRIO]&lt;br /&gt;
** [[Omphalos]]&lt;br /&gt;
** Pick up orphaned OProfile&lt;br /&gt;
[[CATEGORY: Linux]]&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/ZFS</id>
		<title>ZFS</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/ZFS"/>
				<updated>2012-04-28T15:42:10Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: /* Debian-installer */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;Screenshots from [http://www.sprezzatech.com/sprezzos.html SprezzOS] prereleases.&lt;br /&gt;
==[[Growlight|installer]]==&lt;br /&gt;
http://dank.qemfd.net/tabpower/d-i-zfs.png&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/ZFS</id>
		<title>ZFS</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/ZFS"/>
				<updated>2012-04-28T15:41:51Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;Screenshots from [http://www.sprezzatech.com/sprezzos.html SprezzOS] prereleases.&lt;br /&gt;
==[[Debian-installer]]==&lt;br /&gt;
http://dank.qemfd.net/tabpower/d-i-zfs.png&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/ZFS</id>
		<title>ZFS</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/ZFS"/>
				<updated>2012-04-28T15:41:32Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;Screenshots from [http://www.sprezzatech.com/sprezzos.html SprezzOS] prereleases.&lt;br /&gt;
http://dank.qemfd.net/tabpower/d-i-zfs.png&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/ZFS</id>
		<title>ZFS</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/ZFS"/>
				<updated>2012-04-28T06:55:39Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: Created page with &amp;quot;http://dank.qemfd.net/tabpower/d-i-zfs.png&amp;quot;&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;http://dank.qemfd.net/tabpower/d-i-zfs.png&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Bookshelves</id>
		<title>Bookshelves</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Bookshelves"/>
				<updated>2012-04-27T20:08:08Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: /* Alexandria 2010 */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;[[Image:Ivegotyourhackerjeopardyquestionsrighthere.jpeg|thumb|alt=&amp;quot;I've got your hacker jeopardy answers right here&amp;quot;|The Wall of Rigor!]]&lt;br /&gt;
I am in desperate need of bookshelves ('''update: [[Bookshelves#Alexandria_2010|not anymore]]!'''). Desirable traits include:&lt;br /&gt;
* Ash/matted black wood (but not steel, at least not any steel cases I've seen)!&lt;br /&gt;
* 72 inches high or more. 76- and 80-inch shelves aren't rare by any means but do narrow things down quite a bit&lt;br /&gt;
* Either no doors, or the ability to easily remove them without disfiguring or damaging the case&lt;br /&gt;
* As rectilinear a form as possible, and little wasting of space by moulding, thick sides, etc&lt;br /&gt;
* Solid top&lt;br /&gt;
&lt;br /&gt;
Some nice ones:&lt;br /&gt;
* Hayden Tall 30&amp;quot;: http://www.crateandbarrel.com/family.aspx?c=1090&amp;amp;f=27098 $600&lt;br /&gt;
* Tuscan Center (85 3/4&amp;quot;H x 46 1/2&amp;quot;W x 18 3/4&amp;quot;D) http://www.ballarddesigns.com/Furniture/Bookcases/Tuscan-Center-Bookcase/p/2243 $799&lt;br /&gt;
* Riverside Summit 84 (30W x 11.5D x 84H) http://www.bookcasesgalore.com/bookcases/standard/riversidesummit84inchbookcase.cfm $429&lt;br /&gt;
==Too many books, too few bookshelves==&lt;br /&gt;
&amp;lt;gallery&amp;gt;&lt;br /&gt;
File:southernbooks.png|Southern Wall at 689 Myrtle&lt;br /&gt;
File:northernbooks.png|Northern Wall at 689 Myrtle&lt;br /&gt;
File:shelfofrigor.png|Shelf of Rigor at 689 Myrtle&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
==Alexandria 2010==&lt;br /&gt;
I've finally constructed suitable shelving here at [[Viewpoint]]!&lt;br /&gt;
&amp;lt;gallery&amp;gt;&lt;br /&gt;
File:bay1phase2.jpg|Bay 1, Phase 1&lt;br /&gt;
File:bay1phase3.jpg|Bay 1, Phase 2&lt;br /&gt;
File:bay1phase4.jpg|Bay 1, Phase 3&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
&amp;lt;gallery&amp;gt;&lt;br /&gt;
File:IMG_0240.JPG|Bay 2&lt;br /&gt;
File:bay2.jpg|Bay 2, closeup&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
===Filing system===&lt;br /&gt;
* Biographies ought not be separated out into their own section, but rather included among the appropriate subjects.&lt;br /&gt;
* Fiction is separated into collections, poetics, dialogues, and long prose&lt;br /&gt;
** Collections are extracted largely due to shelving concerns&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/File:Bay2.jpg</id>
		<title>File:Bay2.jpg</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/File:Bay2.jpg"/>
				<updated>2012-04-27T20:07:08Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: Bay 2, closeup&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;Bay 2, closeup&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/File:IMG_0240.JPG</id>
		<title>File:IMG 0240.JPG</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/File:IMG_0240.JPG"/>
				<updated>2012-04-27T20:04:55Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: Bay 2&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;Bay 2&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/File:Machines-ToC.pdf</id>
		<title>File:Machines-ToC.pdf</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/File:Machines-ToC.pdf"/>
				<updated>2012-04-26T14:15:19Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: uploaded a new version of &amp;amp;quot;File:Machines-ToC.pdf&amp;amp;quot;&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;Table of Contents for my upcoming book, ''[[Book_ideas#The_Finest_Machine|The Finest Machine]]''.&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Book_ideas</id>
		<title>Book ideas</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Book_ideas"/>
				<updated>2012-04-26T14:09:41Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: /* The Finest Machine */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;==The Finest Machine==&lt;br /&gt;
[[File:Kickstarter.png|thumb|right|Funded (possibly) on Kickstarter]]&lt;br /&gt;
''The Finest Machine: The Science and the Joy of Computing''.&lt;br /&gt;
* Computing from the ground up, beginning with formal systems and moving up through information theory, VLSI, [[Architecture|microprocessors]] and [[Programming Language Theory|programming languages]].&lt;br /&gt;
* [http://www.kickstarter.com/projects/nickblack/the-finest-machine Kickstarter project]&lt;br /&gt;
* [[media:Machines-ToC.pdf|Table of Contents]]&lt;br /&gt;
&lt;br /&gt;
==Nascent Nonfiction==&lt;br /&gt;
* Fill in [[:Category:Computer_Science_Eponyms|computer science eponym list]], market as a phatty ''Dictionary of Ideas'' or ''Binet's Reader's Encyclopedia''-like deal&lt;br /&gt;
* (major and semi-esoteric) [[Trees]]. A chapter on each, kinda like ''The Periodic Kingdom''&lt;br /&gt;
* A guide to low-latency, high-throughput I/O on UNIX and Windows, with an emphasis on API's&lt;br /&gt;
* [[CS GRE|Computer Science GRE]] exam prep&lt;br /&gt;
* Definitive biography of von Neumann (as of 2009, the three major ones are all garbage)&lt;br /&gt;
** possible title: ''Fekete Pestis'' (sets up unfortunate puns on my last name, though)&lt;br /&gt;
* &amp;lt;i&amp;gt;'''The Well-Tempered Computer'''&amp;lt;/i&amp;gt; (working title): an in-depth guide to modern computer hardware with an emphasis on standards&lt;br /&gt;
** Everything from the input power to the output LEDs&lt;br /&gt;
** Creative Commons license&lt;br /&gt;
&lt;br /&gt;
==Nascent Fiction==&lt;br /&gt;
* ''Maximum Scrunch'', a novel&lt;br /&gt;
** the title comes from Hans Bethe's ''Road from Los Alamos'', referring to the conditions at which implosion turns to explosion in a supernova's core collapse&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Book_ideas</id>
		<title>Book ideas</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Book_ideas"/>
				<updated>2012-04-26T14:09:10Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: move TFM to the top&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;==The Finest Machine==&lt;br /&gt;
[[File:Kickstarter.png|thumb|right|Funded (possibly) on Kickstarter]]&lt;br /&gt;
''The Finest Machine: The Science and the Joy of Computing''.&lt;br /&gt;
* Computing from the ground up, beginning with formal systems and moving up through information theory, VLSI, microprocessors and programming languages.&lt;br /&gt;
* [http://www.kickstarter.com/projects/nickblack/the-finest-machine Kickstarter project]&lt;br /&gt;
* [[media:Machines-ToC.pdf|Table of Contents]]&lt;br /&gt;
&lt;br /&gt;
==Nascent Nonfiction==&lt;br /&gt;
* Fill in [[:Category:Computer_Science_Eponyms|computer science eponym list]], market as a phatty ''Dictionary of Ideas'' or ''Binet's Reader's Encyclopedia''-like deal&lt;br /&gt;
* (major and semi-esoteric) [[Trees]]. A chapter on each, kinda like ''The Periodic Kingdom''&lt;br /&gt;
* A guide to low-latency, high-throughput I/O on UNIX and Windows, with an emphasis on API's&lt;br /&gt;
* [[CS GRE|Computer Science GRE]] exam prep&lt;br /&gt;
* Definitive biography of von Neumann (as of 2009, the three major ones are all garbage)&lt;br /&gt;
** possible title: ''Fekete Pestis'' (sets up unfortunate puns on my last name, though)&lt;br /&gt;
* &amp;lt;i&amp;gt;'''The Well-Tempered Computer'''&amp;lt;/i&amp;gt; (working title): an in-depth guide to modern computer hardware with an emphasis on standards&lt;br /&gt;
** Everything from the input power to the output LEDs&lt;br /&gt;
** Creative Commons license&lt;br /&gt;
&lt;br /&gt;
==Nascent Fiction==&lt;br /&gt;
* ''Maximum Scrunch'', a novel&lt;br /&gt;
** the title comes from Hans Bethe's ''Road from Los Alamos'', referring to the conditions at which implosion turns to explosion in a supernova's core collapse&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/File:Kickstarter.png</id>
		<title>File:Kickstarter.png</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/File:Kickstarter.png"/>
				<updated>2012-04-26T14:08:33Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Book_ideas</id>
		<title>Book ideas</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Book_ideas"/>
				<updated>2012-04-26T14:08:22Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: /* The Finest Machine */ link to kickstarter project&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;==Nonfiction==&lt;br /&gt;
* Fill in [[:Category:Computer_Science_Eponyms|computer science eponym list]], market as a phatty ''Dictionary of Ideas'' or ''Binet's Reader's Encyclopedia''-like deal&lt;br /&gt;
* (major and semi-esoteric) [[Trees]]. A chapter on each, kinda like ''The Periodic Kingdom''&lt;br /&gt;
* A guide to low-latency, high-throughput I/O on UNIX and Windows, with an emphasis on API's&lt;br /&gt;
* [[CS GRE|Computer Science GRE]] exam prep&lt;br /&gt;
* Definitive biography of von Neumann (as of 2009, the three major ones are all garbage)&lt;br /&gt;
** possible title: ''Fekete Pestis'' (sets up unfortunate puns on my last name, though)&lt;br /&gt;
* &amp;lt;i&amp;gt;'''The Well-Tempered Computer'''&amp;lt;/i&amp;gt; (working title): an in-depth guide to modern computer hardware with an emphasis on standards&lt;br /&gt;
** Everything from the input power to the output LEDs&lt;br /&gt;
** Creative Commons license&lt;br /&gt;
===The Finest Machine===&lt;br /&gt;
[[File:Kickstarter.png|thumb|right|Funded (possibly) on Kickstarter]]&lt;br /&gt;
''The Finest Machine: The Science and the Joy of Computing''.&lt;br /&gt;
* Computing from the ground up, beginning with formal systems and moving up through information theory, VLSI, microprocessors and programming languages.&lt;br /&gt;
* [http://www.kickstarter.com/projects/nickblack/the-finest-machine Kickstarter project]&lt;br /&gt;
* [[media:Machines-ToC.pdf|Table of Contents]]&lt;br /&gt;
&lt;br /&gt;
==Fiction==&lt;br /&gt;
* ''Maximum Scrunch'', a novel&lt;br /&gt;
** the title comes from Hans Bethe's ''Road from Los Alamos'', referring to the conditions at which implosion turns to explosion in a supernova's core collapse&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Questions</id>
		<title>Questions</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Questions"/>
				<updated>2012-04-26T00:59:18Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;Some questions I've pondered, and my answers, which may or may not be correct.&lt;br /&gt;
&lt;br /&gt;
==UNIX==&lt;br /&gt;
*Q: Why are PF_UNIX sockets the only means of exchanging file descriptors (why not regular pipes? why not PF_INET or PF_INET6 sockets?)&lt;br /&gt;
*A: The socket infrastructure provided sufficient mechanism -- &amp;lt;tt&amp;gt;recvmsg(2)/sendmsg(2)&amp;lt;/tt&amp;gt;, &amp;lt;tt&amp;gt;struct msghdr&amp;lt;/tt&amp;gt; etc. Regular pipes don't have out-of-band signaling capabilities, as used by the &amp;lt;tt&amp;gt;SCM_RIGHTS cmsg_type&amp;lt;/tt&amp;gt;. File descriptors index a kernelspace array, and thus any non-local socket family would introduce the possibility of a copy of those structures (if that is even meaningful and possible in a given context). Furthermore, they're credentials, in that access checks have already been performed; a socket family involving peers not trusted by the local kernel could subvert the [http://en.wikipedia.org/wiki/Access_control access control].&lt;br /&gt;
&lt;br /&gt;
*Q: How do I get a list of fonts known to fontconfig?&lt;br /&gt;
*A: &amp;lt;tt&amp;gt;fc-list&amp;lt;/tt&amp;gt;&lt;br /&gt;
&lt;br /&gt;
*Q: How do I get the start address of an [[ELF]] binary?&lt;br /&gt;
*A: &amp;lt;tt&amp;gt;readelf -h binary | grep &amp;quot;Entry point address:&amp;quot;&amp;lt;/tt&amp;gt;&lt;br /&gt;
&lt;br /&gt;
*Q: How can I run ''program'' as sudo over X? It says it &amp;quot;can't connect to X server at localhost&amp;quot;!&lt;br /&gt;
*A: &amp;lt;tt&amp;gt;sudo -E ''program''&amp;lt;/tt&amp;gt; (you need to preserve your DISPLAY variable. -E preserves environments)&lt;br /&gt;
&lt;br /&gt;
*Q: How can I merge one directory into another?&lt;br /&gt;
*A: &amp;lt;tt&amp;gt;find srcdir -depth -print0 | cpio -pdm0 targdir&amp;lt;/tt&amp;gt;. This uses &amp;lt;tt&amp;gt;cpio&amp;lt;/tt&amp;gt;'s passthrough mode.&lt;br /&gt;
&lt;br /&gt;
*Q: Why doesn't &amp;lt;tt&amp;gt;du&amp;lt;/tt&amp;gt; take an -i argument for inode usage?&lt;br /&gt;
*A: It's difficult (and impossible for regular users) to map directory hierarchies to inodes.&lt;br /&gt;
===Linux===&lt;br /&gt;
*Q: How can I discover a module's parameters?&lt;br /&gt;
*A: &amp;lt;tt&amp;gt;modinfo -p modname&amp;lt;/tt&amp;gt;&lt;br /&gt;
&lt;br /&gt;
*Q: How do I remove an obsolete broken package from Debian upon getting the error &amp;quot;This might mean you need to manually fix this package&amp;quot;?&lt;br /&gt;
*A: &amp;lt;tt&amp;gt;dpkg --force-remove-reinstreq --remove pkgname&amp;lt;/tt&amp;gt;&lt;br /&gt;
===[[X]]===&lt;br /&gt;
*Q: How do I get a list of all a display's clients?&lt;br /&gt;
*A: &amp;lt;tt&amp;gt;xlsclients&amp;lt;/tt&amp;gt;&lt;br /&gt;
&lt;br /&gt;
*Q: How do I get a list of every window?&lt;br /&gt;
*A: &amp;lt;tt&amp;gt;xwininfo -root -children&amp;lt;/tt&amp;gt;&lt;br /&gt;
&lt;br /&gt;
==[[C]]==&lt;br /&gt;
*Q: Why aren't ''&amp;quot;target&amp;quot;''-style &amp;lt;tt&amp;gt;#includes&amp;lt;/tt&amp;gt; a good idea with any sane compiler?&lt;br /&gt;
*A: So long as you can append to the default include search path (ie, the &amp;lt;tt&amp;gt;-I&amp;lt;/tt&amp;gt; option to [[gcc]]), the ''&amp;amp;lt;target&amp;amp;gt;''-style include can search in your project directory. Building from the source toplevel, a simple &amp;lt;tt&amp;gt;-I.&amp;lt;/tt&amp;gt; added to CFLAGS allows #include &amp;amp;lt;toplevel/relative/filename&amp;amp;gt;. Moved headers will trigger a preprocessing failure. If ''&amp;quot;target&amp;quot;''-style &amp;lt;tt&amp;gt;#includes&amp;lt;/tt&amp;gt; are used, the directory of the source being compiled is typically searched prior to other include paths. This means moving source files or introducing new headers can change the files being included, which is almost always undesirable.&lt;br /&gt;
===[[GCC]]===&lt;br /&gt;
*Q: How do I see which optimization flags are enabled with -Ox?&lt;br /&gt;
*A: Check the info pages, or use -Q -Ox --help=optimizers.&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/File:Machines-ToC.pdf</id>
		<title>File:Machines-ToC.pdf</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/File:Machines-ToC.pdf"/>
				<updated>2012-04-24T16:46:55Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: uploaded a new version of &amp;amp;quot;File:Machines-ToC.pdf&amp;amp;quot;: Fixed greek typo, lots of other detail work.&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;Table of Contents for my upcoming book, ''[[Book_ideas#The_Finest_Machine|The Finest Machine]]''.&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/PDF</id>
		<title>PDF</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/PDF"/>
				<updated>2012-04-23T16:24:43Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;* Combining PDFs: &amp;lt;tt&amp;gt;gs -dNOPAUSE -sDEVICE=pdfwrite -sOUTPUTFILE=output.pdf -dBATCH files-to-combine&amp;lt;/tt&amp;gt;&lt;br /&gt;
* Select pages: &amp;lt;tt&amp;gt;pdftk old.pdf cat pageranges output new.pdf&amp;lt;/tt&amp;gt;&lt;br /&gt;
* Remove password: &amp;lt;tt&amp;gt;gs -q -dNOPAUSE -dBATCH -sDEVICE=pdfwrite -sOutputFile=unencrypted.pdf -c .setpdfwrite -f encrypted.pdf&amp;lt;/tt&amp;gt;&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Hack_on</id>
		<title>Hack on</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Hack_on"/>
				<updated>2012-04-22T21:01:47Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;__NOTOC__&lt;br /&gt;
==this is qemfd.net (and the real [[User:dank|nick black]])!==&lt;br /&gt;
This is the home server of [mailto:dankamongmen@gmail.com Nick Black] (aka [[User:Dank|dank]]), located at [[LOC record|33°46′44.4&amp;quot;N, 84°23'2.4&amp;quot;W (33.779, 85.384)]] in the heart of Midtown Atlanta, GA (see &amp;lt;i&amp;gt;'''[[blackwiki:Community_Portal|exciting recent news!]]'''&amp;lt;/i&amp;gt;). This wiki is primarily for my personal use, but open to public viewing in case anything generally helpful emerges. I make no guarantees concerning correctness, relevance, or timeliness of the information contained herein. Track changes using the [[Special:RecentChanges|Recent changes]] page, RSS, or [http://www.google.com/reader/view/#stream/feed%2Fhttp%3A%2F%2Fdank.qemfd.net%2Fdankwiki%2Findex.php%3Ftitle%3DSpecial%3ARecentChanges%26feed%3Drss Google Reader]. However you roll, blackwiki's rollin' wit' you. I was pondering a [http://moneycachehoes.blogspot.com strictly technical blog], but this wiki and [[Grad_school|grad school]] have satisfied ye olde ''furor scribendi''. Until then, don't mistake my kindness for weakness: ''rien n'est simple, mais tout est facile...''  My résumé is available [[R%C3%A9sum%C3%A9|here]].&lt;br /&gt;
&amp;lt;hr&amp;gt;&lt;br /&gt;
[[File:LookForAnswers.jpg|right|thumb|I like to stay up late on the computer, looking for answers.]]&lt;br /&gt;
Seriously: I primarily write to force my own understanding, and remember things (a ''few'' entries are actually semi-authoritative). I'm just a [http://en.wikipedia.org/wiki/The_Rime_of_the_Ancient_Mariner disreputable Mariner] on your way to the Wedding. '''If you derive use from this wiki, consider yourself lucky, and please get confirmation before relying on my writeups to perform surgery, design planes, determine whether a graph ''G'' is a [[Aanderaa–Rosenberg_Conjecture|scorpion]], or feed your pet rhinoceros.'''&amp;lt;hr&amp;gt;&lt;br /&gt;
'''''QEMFD!''''' ([http://en.wikipedia.org/wiki/Q.E.D. wikipedia], [http://mathworld.wolfram.com/QED.html wolfram]) '''''also provides...'''''&lt;br /&gt;
* [http://bugs.qemfd.net/ bugzilla] for projects like&lt;br /&gt;
** [[omphalos]] (bug [http://bugs.qemfd.net/buglist.cgi?cmdtype=runnamed&amp;amp;namedcmd=omphalos list], file a [http://bugs.qemfd.net/enter_bug.cgi?product=omphalos new bug])&lt;br /&gt;
** [[libtorque]] (bug [http://bugs.qemfd.net/buglist.cgi?cmdtype=runnamed&amp;amp;namedcmd=libtorque list], file a [http://bugs.qemfd.net/enter_bug.cgi?product=libtorque new bug])&lt;br /&gt;
** [[libdank]] (bug [http://bugs.qemfd.net/buglist.cgi?cmdtype=runnamed&amp;amp;namedcmd=libdank list], file a [http://bugs.qemfd.net/enter_bug.cgi?product=libdank new bug])&lt;br /&gt;
* Hudson for [http://dank.qemfd.net:8080/ autobuilding the same]!&lt;br /&gt;
* [http://dank.qemfd.net/phpsysinfo/ phpSysInfo] / [http://dank.qemfd.net/cgi-bin/awstats.pl AWStats] / [http://dank.qemfd.net/qemfcacti/ Cacti] / [http://dank.qemfd.net/cgi-bin/mon.cgi MON] / [https://dank.qemfd.net/crm VTigerCRM]&lt;br /&gt;
* Assorted HTTrack [http://dank.qemfd.net/httrack/ mirrors] of varying fidelity.&lt;br /&gt;
* [http://dank.qemfd.net/oldindex.html old main page] (including directions + contact info) ■&lt;br /&gt;
&lt;br /&gt;
==[[:Category:Projects|Projects?]]==&lt;br /&gt;
[[File:Icon-computerguybleeding.gif|right|frame|Faster hands → less whipping.]]&lt;br /&gt;
* [[Hackery]]! (projects and open source work). The [[Personal machines|machines]].&lt;br /&gt;
* The [[WORDHORDE]]. Some [[book ideas|books]] I'd like to write.&lt;br /&gt;
* [[Grad school]] and [[CS GRE]] prep page. Some notes on [[LaTeX]].&lt;br /&gt;
* [[Elemental naming]] and good [[wordlist|words]]. [[Atlanta]].&lt;br /&gt;
* [[BlackBerry]]/[[Android]] crap. F'n [[bookshelves]]. Matrix of first-generation ([[Nehalem]]) [[i7 laptops]].&lt;br /&gt;
* What does worldwide [http://en.wikipedia.org/wiki/Tab_(soft_drink) TaB®] consumption have to do with [[nuclear weapons]]?&lt;br /&gt;
* My grad school [[:File:CS8803MCAPresentation.pdf|presentations]] tended to [[:File:CS8803DCPresentationKlaiber.pdf|run slightly]], just a little, [[:File:CS8803DCPresentationGschwind.pdf|unorthodox]]...&lt;br /&gt;
* Other peoples' [[repositories|projects]]. Other people's [[programming quotes]].&lt;br /&gt;
&lt;br /&gt;
==UNIX==&lt;br /&gt;
[[File:Debianelitism.jpg|thumb|right|Debian Linux: Would you like fries with that elitism?]]&lt;br /&gt;
* Writing high-performance, scalable [[Fast UNIX Servers|UNIX system applications]] is my primary passion.&lt;br /&gt;
* [[Linux APIs]], [[FreeBSD APIs]], [[ELF]] (which is not, in itself, an API).&lt;br /&gt;
* [[Power Management]]. [[Sound Software]], [[Using Unicode]]. Keeping FreeBSD [[Updating FreeBSD|up-to-date]]. Hacking [[CUDA]] on [[Debian]].&lt;br /&gt;
* [[Debian]], [[Xorg hell]], [[Consoles]] and [[Framebuffer|Framebuffers]]. Recent insanity: [[DBus]], [[HAL]]. Making graphs with [[dot]].&lt;br /&gt;
* Notes on [[MediaWiki editing|editing]] and [[MediaWiki|running MediaWiki]]. [[Core]] files happen when one dances fandango on [[core]]. Notes on [[subversion]].&lt;br /&gt;
* [[Linux on Dells]], [[SMART]] and [[SATA]], [[udev]], various linux-related [[hardware detritus]] (mainly random personal crap).&lt;br /&gt;
&lt;br /&gt;
==A few remarks regarding computers etc.==&lt;br /&gt;
[[File:Thatshitcray.jpg|right|thumb|That shit Cray!]]&lt;br /&gt;
* [[glibc]], other [[interesting libraries]], [[working with libraries]], some implementing interfaces like [[pthreads]].&lt;br /&gt;
* [[X Macros]], [[ISO C99]], [[rpaths]], [[GCC|gcc]] notes, [[GNU Make|gmake]] notes.&lt;br /&gt;
* There's [[Buses and Ports]], of course, of course.&lt;br /&gt;
* Intel's [[Sandy Bridge]] and [[Nehalem]] x86 [[microarchitectures]].&lt;br /&gt;
** or, if you'd prefer, [[Transmeta|Transmeta's]] or [[Tilera|Tilera's]] processors.&lt;br /&gt;
* The [[cpuid]] instruction, [[SMP on x86]], [[Performance Counters]], [[simulators]].&lt;br /&gt;
** Simulators ought not be confused with the [[4000 Linux VT Solutions|4,000 Linux VT Solutions]]!&lt;br /&gt;
* Getting into [[ARM]]. Getting into [[ACPI]]. Getting into [[Architecture]]. I want a (PIVT, middle-endian, 27-bit word) MISD machine; until then, there's [[SIMD]].&lt;br /&gt;
* [[Lamport's Hash]], [[Lamport's Clock]], [[Skip Lists]], I will put thoughts about [[automata|automata here]], [[Dijkstran Method]].&lt;br /&gt;
* [[Flash]] sucks. Need get a handle on [[Compiler Design]] by tomorrow's midterm.&lt;br /&gt;
** Now it's [[Programming Language Theory]] by tomorrow's final, heh.&lt;br /&gt;
* [[Trees]] for smoking and computing. [[Lock-free algorithms|lock- and wait-free]] algorithms. [[Cache-oblivious algorithms]]. [[RCU]].&lt;br /&gt;
* [[Allocators]] get us that free store, son (usually through a [[DRAM]]-backed VM)!&lt;br /&gt;
** Said VM ''might'' implement [[transactional memory]], and ''almost certainly'' works on [[pages]].&lt;br /&gt;
* Via [[Grover's Algorithm]], we might be able to discover the monster at the end of this quantum book.&lt;br /&gt;
* [[Jefferson's Time Warp]] algorithm, and while we're at it, [[timer wheels]] and even [[x86 timing]].&lt;br /&gt;
* Let's get bipartite, bipartite...with [[bip buffers]]. I don't much care for writing [[Gecko Addons]] (aka [http://www.mozilla.com/en-US/firefox/upgrade.html FireFox plugins]).&lt;br /&gt;
* [[Ling adders]], [[Blum's axioms]], and [[Rice's Theorem]] are all named after people smarter than me...&lt;br /&gt;
** ...as are [[Chaitin's Constant]] and [[Kolmogorov complexity]], and lots of [http://dank.qemfd.net/dankwiki/index.php/Category:Computer_Science_Eponyms other junk].&lt;br /&gt;
* Too many [[morphisms]]! Still have any [[Questions|questions?]]&lt;br /&gt;
&lt;br /&gt;
==Networking==&lt;br /&gt;
[[File:internet.jpg|right|thumb]]&lt;br /&gt;
* Please adhere to the various [[Standards#Networking_standards|standards]] (even where mutually contradictory)&lt;br /&gt;
** &amp;quot;As one judge said to another, '' 'Be just, and when you can't be just, be arbitrary.' ''&amp;quot;&lt;br /&gt;
* [[Topology Discovery]]. Online tools for [[Internet analytics]].&lt;br /&gt;
* [[SSHFP]] and [[LOC record|LOC]] records. [[DNSSEC]]. The Sender Policy Framework ([[SPF]]). [[VoIP]] and telephony, NAPTR records.&lt;br /&gt;
* Some [[TCP]] notes. [[Syncookies]]. [[ARP]] is no longer used in [[IPv6]], which more fully embraces [[Zeroconf|zero-configuration networking]].&lt;br /&gt;
* [http://dank.qemfd.net/faqicap.html The Working Man's Guide to ICAP], [[ICAP]] page&lt;br /&gt;
* [http://dank.qemfd.net/BIginternet Mirror] of the BIg-Internet list from ftp://munnari.oz.au&lt;br /&gt;
* [[Tunneling]], [[SNMP]], [[NFS]]...[[Van Jacobson Channels]] get everybody all hooting and hollaring every decade or so&lt;br /&gt;
&amp;lt;hr&amp;gt;&lt;br /&gt;
&amp;lt;div style=&amp;quot;text-align: right;&amp;quot;&amp;gt;'''''quod erat demonstrandum!'''''&amp;lt;/div&amp;gt;&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/File:Thatshitcray.jpg</id>
		<title>File:Thatshitcray.jpg</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/File:Thatshitcray.jpg"/>
				<updated>2012-04-22T21:00:36Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: That shit Cray!&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;That shit Cray!&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/File:Libtorque-presentation.pdf</id>
		<title>File:Libtorque-presentation.pdf</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/File:Libtorque-presentation.pdf"/>
				<updated>2012-04-21T03:50:24Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: uploaded a new version of &amp;amp;quot;File:Libtorque-presentation.pdf&amp;amp;quot;&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;Presentation to GT's Arch-Whiskey research group on libtorque, 2009-11-13.&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/GNOME</id>
		<title>GNOME</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/GNOME"/>
				<updated>2012-04-21T02:53:17Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: /* Compiz */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;In March of 2010, I finally moved from my venerable XFCE4 + Xfwm setup to a glitzy GNOME + Compiz desktop. The experiment is largely successful thus far.&lt;br /&gt;
==Disabling gnome-shell==&lt;br /&gt;
gnome-shell, from what I can tell, is launched as part of the session definition file (/usr/share/xsessions/gnome.desktop). You can copy this to gnome-fallback.session in $XDG_CONFIG_DIR/gnome-session/sessions and run gnome-session out of .xsession without arguments, or (probably better) provide the --session argument to gnome-session and keep the modified file somewhere personal.&lt;br /&gt;
==Screenlets==&lt;br /&gt;
* The terminology is apparently &amp;quot;[http://en.wikipedia.org/wiki/Widget_engine Widget Engine]&amp;quot;?&lt;br /&gt;
* Anyway, I like [http://www.screenlets.org/index.php/Home screenlets.org]...for now. gDesklets?&lt;br /&gt;
** It's said to be a [http://ubuntuforums.org/showthread.php?t=1314575 dead project]...&lt;br /&gt;
** I like the [http://www.screenlets.org/index.php/WaterMark WaterMark] screenlet&lt;br /&gt;
==Compiz==&lt;br /&gt;
* Get compiz running via &amp;lt;tt&amp;gt;compiz --replace&amp;lt;/tt&amp;gt;.&lt;br /&gt;
** Add this to GNOME's startup applications to make it your default window manager&lt;br /&gt;
** Better than this command in your .xinitrc/.xsession is changing the &amp;quot;Window Manager&amp;quot; element of GNOME's Session-RequiredElements registry key.&lt;br /&gt;
* Enable Alt+Tab window switching via the &amp;quot;Application Switcher&amp;quot; plugin&lt;br /&gt;
** I don't like the zooming effect; scale it to 0x&lt;br /&gt;
* Enable Super+Tab folded window switching via the &amp;quot;Shift Switcher&amp;quot; plugin&lt;br /&gt;
** Has some conflicts with &amp;quot;Application Switcher&amp;quot; by default; I disable all but &amp;quot;Next Window&amp;quot;, &amp;quot;Previous Window&amp;quot; and &amp;quot;Initiate&amp;quot;&lt;br /&gt;
** Be sure the &amp;quot;Text&amp;quot; rendering plugin is enabled to get window titles&lt;br /&gt;
* Enable desktop backgrounds with the &amp;quot;Wallpaper&amp;quot; plugin&lt;br /&gt;
** You'll want disable Nautilus's attempt to manage the background: use gconf-editor and unset apps/nautilus/preferences/show_desktop&lt;br /&gt;
** Note that this will disable your desktop icons.&lt;br /&gt;
* Enable Ctrl+Alt+arrow virtual desktop switching via the &amp;quot;Rotate Cube&amp;quot; plugin&lt;br /&gt;
* &amp;quot;Trailfocus&amp;quot; handles general transparency&lt;br /&gt;
** Set &amp;quot;Window to Start Fading&amp;quot; to 1&lt;br /&gt;
** Change opacity levels of unfocused and focused windows to 60 and 95, respectively&lt;br /&gt;
* Cube: I use&lt;br /&gt;
** transparency on rotate (requires that Compiz draw wallpaper)&lt;br /&gt;
** Spherical deformation on rotate&lt;br /&gt;
** Inside-the-cube view&lt;br /&gt;
* App Switcher&lt;br /&gt;
** Maximize &amp;quot;Speed&amp;quot;&lt;br /&gt;
** Minimize &amp;quot;Timestep&amp;quot;&lt;br /&gt;
** Enable &amp;quot;Mipmap&amp;quot;, &amp;quot;Bring to Front&amp;quot;, &amp;quot;Icon&amp;quot;, &amp;quot;Minimized&amp;quot;, and &amp;quot;Auto-Rotate&amp;quot;&lt;br /&gt;
** Reduce &amp;quot;Opacity&amp;quot; to 10&lt;br /&gt;
===Other Plugins===&lt;br /&gt;
* I like the &amp;quot;animations&amp;quot; plugin&lt;br /&gt;
* The &amp;quot;Window Titles&amp;quot; plugin is useful in conjunction with [[OpenSSH|SSH]] forwarding&lt;br /&gt;
* Go ahead and use &amp;quot;[http://en.wikipedia.org/wiki/Bicubic_interpolation Bicubic Filtering]&amp;quot; if you've got the horsepower&lt;br /&gt;
===Keybindings===&lt;br /&gt;
* &amp;quot;General Options&amp;quot; -&amp;amp;gt; &amp;quot;Key Bindings&amp;quot;:&lt;br /&gt;
** Toggle vertical maximize: Ctrl+Up&lt;br /&gt;
** Toggle horizontal maximize: Ctrl+Right&lt;br /&gt;
** Disable everything else save &amp;quot;Close Window&amp;quot; (Alt+F4), &amp;quot;Window Menu&amp;quot; (Alt+space)&lt;br /&gt;
* &amp;quot;Commands&amp;quot;&lt;br /&gt;
** &amp;lt;tt&amp;gt;/usr/bin/x-terminal-emulator&amp;lt;/tt&amp;gt;: Alt+F1&lt;br /&gt;
** &amp;lt;tt&amp;gt;/usr/bin/x-www-browser&amp;lt;/tt&amp;gt;: Alt+F3&lt;br /&gt;
&lt;br /&gt;
==Nautilus==&lt;br /&gt;
* Video thumbnailing requires &amp;lt;tt&amp;gt;totem-video-thumbnailer&amp;lt;/tt&amp;gt;, part of the &amp;lt;tt&amp;gt;totem&amp;lt;/tt&amp;gt; package&lt;br /&gt;
** You'll also likely need raise the limit on thumbnailable media files; I thumbnail any local file &amp;lt; 1G&lt;br /&gt;
==GNOME Panel==&lt;br /&gt;
* Users of taskbars (the &amp;quot;Window Selector&amp;quot; applet) will want to look into Compiz's &amp;quot;Window Preview&amp;quot; plugin&lt;br /&gt;
* Transparency can be had regardless of the GTK theme if using compiz's &amp;quot;Opacity, Brightness and Saturation&amp;quot; plugin&lt;br /&gt;
** Add an opacity rule (I use a value of 50): &amp;quot;&amp;lt;tt&amp;gt;(class=Gnome-panel) &amp;amp; !(type=PopupMenu | Dialog)&amp;lt;/tt&amp;gt;&amp;quot;&lt;br /&gt;
* I use avant-window-navigator now&lt;br /&gt;
==GNOME Control Center==&lt;br /&gt;
* Ensure hinting and subpixel ordering is optimized via a trip to the [http://www.lagom.nl/lcd-test/ Lagom LCD Test] page&lt;br /&gt;
* Don't set wallpaper here if Compiz is handling it&lt;br /&gt;
==See Also==&lt;br /&gt;
* [[Xorg hell|Xorg]] page&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/File:Machines-ToC.pdf</id>
		<title>File:Machines-ToC.pdf</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/File:Machines-ToC.pdf"/>
				<updated>2012-04-20T09:52:13Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: uploaded a new version of &amp;amp;quot;File:Machines-ToC.pdf&amp;amp;quot;: New cover&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;Table of Contents for my upcoming book, ''[[Book_ideas#The_Finest_Machine|The Finest Machine]]''.&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Architecture</id>
		<title>Architecture</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Architecture"/>
				<updated>2012-04-20T06:46:23Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: /* Register-level parallelism */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;==Stored Programs==&lt;br /&gt;
The [http://en.wikipedia.org/wiki/Von_Neumann_architecture stored-program model] of [http://en.wikipedia.org/wiki/John_von_Neumann Von Neumann] suggests a [http://en.wikipedia.org/wiki/Turing_equivalent Turing-equivalent] physical device that, using modern manufacturing and materials, is at once:&lt;br /&gt;
*Fast (usefully many transitions of a Turing machine can be emulated per unit time),&lt;br /&gt;
*Reliable (the probability of undetected and detected errors can be meaningfully bounded), and&lt;br /&gt;
*Reprogrammable at a purely symbolic, as opposed to physical, level&lt;br /&gt;
[[Digital]], finite transformations will be performed by processing units connected to memories (stores) and I/O devices.&lt;br /&gt;
*By '''[[digital]]''', we mean that [http://en.wikipedia.org/wiki/Irrational_number irrational numbers] cannot be faithfully reproduced in variables, nor [http://en.wikipedia.org/wiki/Analog_signal analog signals] in samples -- we can work directly (without approximation) only with [http://en.wikipedia.org/wiki/Countable_set countable sets] (see the [[real computing]] of Blum et al for another perspective).&lt;br /&gt;
*By '''finite''', we mean that a given store can contain only a [http://en.wikipedia.org/wiki/Finite_set finite set] of strings having finite [http://en.wikipedia.org/wiki/Shannon's_source_coding_theorem Shannon Entropy] -- essentially, finite integers. By combining the two, our domain becomes finite sets of finite [http://en.wikipedia.org/wiki/Algorithmic_complexity_theory algorithmic complexity theory] (or so I understand things to work) -- the so-called [http://en.wikipedia.org/wiki/Computable_number computable numbers].&lt;br /&gt;
*'''Processing units''' expose simple functional building blocks (maps from finite sets of integers to finite sets of integers) and communication primitives through which connected devices might be manipulated. An [http://en.wikipedia.org/wiki/Instruction_set_architecture instruction set architecture (ISA)] defines the syntax and semantics of these finite languages.&lt;br /&gt;
*'''Memories''' provide finite storage areas parameterized any number of ways (cost, burst rate, sustained rate, latency, reliability, etc). Arbitrary finite binary strings can be placed into memories by the processor.&lt;br /&gt;
*'''I/O devices''' provide samples from the world external to this computing system.&lt;br /&gt;
Arbitrary finite strings in any non-empty alphabet are sufficient to encode any finite, discrete information, including programs expressed in the ISA.&lt;br /&gt;
&lt;br /&gt;
In the sequential execution model, each processing unit contains a program counter. The processor fetches the first instruction from memory, as indexed by the program counter. The program counter is then incremented. The instruction's operands, if any, are fetched, and it is executed. Execution might result in changes to the architectural state (including the program counter) of the processor, to memory, and/or to I/O devices. These changes are committed, and the next instruction is fetched. Each instruction might correspond to many clock cycles. This model is dominant among general-purpose microprocessors; for other models, see [http://en.wikipedia.org/wiki/Dataflow_architecture dataflow architectures] and [http://en.wikipedia.org/wiki/Transport_triggered_architecture transport-triggered architectures]. Out-of-order processors combine stored, serialized programs with data flow-based triggering, yielding &amp;quot;restricted data flow architectures&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
==Parallelism==&lt;br /&gt;
===Bit-level parallelism===&lt;br /&gt;
===Register-level parallelism===&lt;br /&gt;
* See the [[SIMD|SIMD page]].&lt;br /&gt;
&lt;br /&gt;
===Instruction Level parallelism===&lt;br /&gt;
===Memory Level parallelism===&lt;br /&gt;
===Thread Level parallelism===&lt;br /&gt;
&lt;br /&gt;
==Hardware==&lt;br /&gt;
===Memory Hierarchies===&lt;br /&gt;
Processor clocking and even instruction set design is intimately related to access times of the lowest-level cache of the main memory.&lt;br /&gt;
* Stores: large, off-chip memories. System [[DRAM]] provides a volatile store (this is typically what's meant by &amp;quot;main memory&amp;quot;), while ferromagnetic and optical disks provide non-volatile, slower, larger stores (often called &amp;quot;secondary memory&amp;quot;). As stores get larger, access times usually increase; taken to an extreme, the Internet is just a highly unreliable, massively-distributed store exhibiting wildly varying access times: a memory for all mankind.&lt;br /&gt;
* [[Architecture#Caches|Caches]]: Submemories. Performance-critical components of a store's abstraction -- like any abstraction's internals, their user [[Cache-oblivious algorithms|oughtn't need know them]] to make use of the abstraction, but [[Cache-aware algorithms|might require intimate knowledge]] to make full and efficient use! SRAM close to or on the chip serves as (often multiple-level) caches for main system [[DRAM]]. A section of [[DRAM]] is often used as a &amp;quot;page cache&amp;quot; for system disk (system [[DRAM]] as a whole, however, is *not* a cache of disk. Swap is a part of virtual memory implementation and not germane to discussion of cache). Caches take advantage of predictable access patterns (temporal clustering, spatial clustering, software and hardware prefetching) to provide faster access to a subset of the memory abstraction. In exchange, they add complexity, draw power, and often consume both large swaths of a system's transistor budget and prime real estate. In the absence of accurate prediction (very random patterns, woefully undersized cache, etc), the memory system is said to be thrashing, and performance can be substantially worsened relative to an uncached memory. Usually, however, caches lead to drastic performance improvements.&lt;br /&gt;
** In a computer architecture context, &amp;quot;cache&amp;quot; usually refers only to the (possibly-multilevel) caches of main memory.&lt;br /&gt;
** In an OS context, &amp;quot;cache&amp;quot; might refer to any store.&lt;br /&gt;
* Data units: Generally known as registers, this memory is directly available to execution units. It is capable of being updated every cycle, although such a supply might be impossible. Read and write ports directly connects the register file to [[Combinatorial devices|combinatorial hardware]] and main memory. On some architectures, instructions can directly reference memory.&lt;br /&gt;
Memory hierarchies are highly discretized. Storage offered by different memories usually involves quantitative shifts measured in orders of magnitude, as does time required to access them -- nanoseconds for small on-die SRAMs, microseconds for uncached access to system [[DRAM]], milliseconds for hard drive accesses, fractions of a second for network transfers (hey, it still beats the post office).&lt;br /&gt;
&lt;br /&gt;
====Caches====&lt;br /&gt;
Given the tradeoff and potentialities involved in cache design, and the wide gap between access times of different stores, caches are often multitiered. Current processors often support three levels of hardware cache; almost all disks provide a few megabytes of [[DRAM]] as a cache well before, and for different purposes than, the operating system introduces a page cache. Among the levels of a multitiered cache, two levels can be:&lt;br /&gt;
* inclusive: the lower level is a strict subset of data available in the higher level&lt;br /&gt;
* exclusive: the caches share no data&lt;br /&gt;
* unrelated: data might be present in both caches&lt;br /&gt;
Exclusive caches minimize redundancy between cache levels, but force complexity in multiprocessor systems and even in uniprocessor systems with different line lengths across cache levels.&lt;br /&gt;
Similarly, the main memory's cache is often split into an instruction cache and data cache, with their own ports (and possibly different implementations and sizes), yielding improved access times and fewer structural hazards (instructions can be fetched, while in another unit data are accessed, without structural hazards or expensive logic). A unified cache can make more complete use of the memory available, however, especially for very small programs, effectively trading the risk of conflicts for greater capacity.&lt;br /&gt;
&lt;br /&gt;
Reads are the common case -- 1 instruction cache hit (barring trace caches, etc) for every instruction issued, and loads usually substantially outweighing stores for data cache (or unified cache) access. They're also faster (assuming the data is in cache): the processor needn't specify the width of the load, and the data can be loaded while the tag is being checked -- if the tag doesn't match, no harm is done. Writes must wait for the tag to be verified. Write-combining can be performed in unflushed write buffers or dirty lines of a write-back cache, saving memory bandwidth. Writing policies (configured on the x86 via [[MTRR]]s or [[PAT]]s) include:&lt;br /&gt;
* Write-through: the write propagates out throughout the store abstraction (ie, from L1 cache, over an exclusive L2 cache, to system [[DRAM]]). Simple to implement, as writes need no buffers and loads resulting in evictions never force writebacks. Cache and backing store exhibit data coherence (observers never see a different value in memory than what's in cache), a useful property in the presence of multiple cores or DMA. In order to write at the full speed of the cache, writes must be buffered; for a load which overwhelms the write buffer, or in its absence, the processor will see write stalls above and beyond the cache timings even for cached data.&lt;br /&gt;
* Write-back: the write is only applied to the cache. Memory is updated when the line is replaced. Minimizes latency for the attached execution unit -- potential write throughput is equivalent to that of the cache. Saves memory bandwidth and power, but requires a coherency protocol (with its own state requirements). Minimally, a dirty bit indicates that the line need be written back upon eviction. In the presence of multiple, independent caches at the same level of a store abstraction, full cache coherency protocols such as MESI are used. Write-back caches also tend to employ write buffers (so that reads might be prioritized; see below), also known as &amp;quot;victim buffers&amp;quot; by AMD (not to be concerned with victim caches, small fast direct-mapped stores into which all evicted lines go, not just dirty ones -- the goal of this latter is to minimize the impact of conflict misses, not eliminate blocking on writebacks).&lt;br /&gt;
&lt;br /&gt;
A cache hit occurs when data being referenced is valid in the cache; otherwise the reference is a cache miss. A bit is typically devoted to determining validity of a cacheline. The cache is initialized so that all lines are marked invalid. As lines are loaded, they become valid. In the absence of cache coherency protocols and context switches, lines once valid will remain valid (but might change address); other processors' writes might invalidate lines in a multicore system. Misses are categorized into four types:&lt;br /&gt;
* Compulsory miss, if the data had not yet been referenced. It has otherwise been evicted and is a...&lt;br /&gt;
* Coherence miss, if another processor invalidated this line&lt;br /&gt;
* Capacity miss, if the eviction (and thus miss) would have occurred despite full associativity.&lt;br /&gt;
* Conflict miss, otherwise. A fully-associative cache, by definition, never suffers conflict misses.&lt;br /&gt;
If there are no suitable invalid lines for a cache miss, there will be a cache replacement. In the absence of direct mapping (ie, n-associativity where n&amp;gt;1), a non-trivial replacement policy decides which member of a set to evict. Page faults are managed by the operating system, due to the high miss latencies and importance of making a good eviction decision. These algorithms are widely varied, and beyond the scope of this article. Architectural policies for cache replacement are primarily measured by their preservation of temporal locality, and include:&lt;br /&gt;
* LRU: This can be and is implemented several ways (high-speed stack, use of lg2(n) bits to track only the one truly least recently used element (&amp;quot;True LRU&amp;quot;), the 2Q algorithm...I've got an idea that uses indexes into permutation tables). Most expensive, in terms of space and time. Maximizes use of temporal locality -- for m&amp;lt;n references which go unused, n-m reused references will remain in cache. Every access results in an update, and some implementations require multiple updates per access. Fundamentally exponential state requirements generally preclude precise LRU for large n.&lt;br /&gt;
* Pseudo-LRU: Uses n-1 bits to weigh paths in a full binary tree of height lg2(n). Exhibits O(1) selection time, but requires an O(1) update on every access (like LRU). Tracks some patterns well, others poorly (''FIXME'' find better analysis).&lt;br /&gt;
* FIFO: The oldest (as opposed to least-recently-used) line is evicted. This can be implemented in O(1) selection and update time via n bits per set (it's simply a counter modulo 2^n). Updates are only performed upon a replacement, as opposed to every access.&lt;br /&gt;
* Random: Since complexity is traded off against preservation of temporal locality, programs exhibiting little temporal locality (randomly-accessed databases) are best served by the simplest solution surjective onto members of a set. This can be done with a pseudorandom replacement policy. Such a cache usually allows programmer control of seeding, to support debugging and profiling.&lt;br /&gt;
Write misses are relatively rare; when they do occur, either a line is evicted and the standard write policy is invoked, or in a &amp;quot;non-write-allocating&amp;quot; policy the missing caches are untouched. This is rare for write-back caches of volatile memory, since data written therein is usually read. It makes more sense in a non-volatile memory's cache (H&amp;amp;P4 C-14 says this is also true for volatile write-through, but I find their reasoning to be flawed due to write buffers). Note that the processor stalls earlier in the pipeline due to read misses than write misses.&lt;br /&gt;
&lt;br /&gt;
Memory performance is quantized in terms of average memory access time (AMAT), equal to hit penalty + miss rate * miss penalty (this being the penalty added by the miss, not end-to-end latency for a miss; this latter would be hit penalty + miss penalty) and expressed in terms of cycles or, less commonly, absolute time (calculating or indeed defining miss penalty for out-of-order, especially superscalar, processors is difficult, and done various ways). Thus, memories can be improved by (assuming other parameters are held constant):&lt;br /&gt;
* Reducing hit penalty: avoid address translation (use the virtual address -- VIVT, Virtual-Index/Virtual-Tag)&lt;br /&gt;
* Improving hit rate: increase number of lines, increase line length, increase associativity&lt;br /&gt;
* Reducing miss penalty: multilevel caches, prioritizing reads over writes&lt;br /&gt;
* Parallelizing: interleaved/banked cache&lt;br /&gt;
&lt;br /&gt;
Avoiding address translation introduces aliasing: a single cacheline worth of backing store might be represented twice in a cache, since each process (usually) has its own virtual memory. It also forces page access settings to be copied into the cache from the TLB, and PID-tagging lest cache flushes be required upon context switches. Thus, VIPT -- Virtual-Index, Physical-Tag -- translation is performed in parallel with indexing based solely upon the page offset (shared between physical and virtual addresses), and physical addresses are used beyond the lowest-level cache (PIPT, Physical-Index Physical-Tag). Adding capacity incurs transistor and power cost, and can slightly increase access penalty. Increasing associativity can increase access penalty even more, and also has hardware costs. Augmenting either can actually decrease hit rates for a given workload, due to the interactions between addresses and cache geometry. There's four rules of thumb here:&lt;br /&gt;
* Associativity beyond 8-way is useless, except for very small (a few K at most) caches&lt;br /&gt;
* For caches less than a hundred K or so, miss rate for fKb under 2-way associativity ~= miss rate for 2fKb direct mapped&lt;br /&gt;
* Associativity, especially beyond 2-way, is a bad idea for large caches...&lt;br /&gt;
* Unless it's a second-level cache or higher, in which case 2-way is just about right.&lt;br /&gt;
Increasing cacheline length is the only way to reduce compulsory misses (at the expense of increased latency loading misses, although this can be addressed via &amp;quot;early-restart&amp;quot; or &amp;quot;critical first&amp;quot; load schemes), but with insufficient spatial locality longer cachelines lead to increased conflict or even capacity misses and waste memory bandwidth. High-bandwidth, high-latency memories are thus well-suited to large cachelines, as are stream-oriented tasks.&lt;br /&gt;
&lt;br /&gt;
====Virtual Memory====&lt;br /&gt;
[[File:Memoryhierarchy.png|thumb|right|alt=&amp;quot;Diagram of address translation&amp;quot;]]&lt;br /&gt;
&lt;br /&gt;
==See Also==&lt;br /&gt;
* Intel's [http://www.tomshardware.com/reviews/intel-atom-cpu,1947-6.html Atom] uses an eight-transistor (and thus lower-voltage) SRAM technology?&lt;br /&gt;
* Agner Fog's Intel and AMD [http://www.agner.org/optimize/ microarchitecture references]&lt;br /&gt;
[[Category: x86]]&lt;br /&gt;
[[Category: CS GRE Prep]]&lt;br /&gt;
[[CATEGORY: Hardware]]&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Architecture</id>
		<title>Architecture</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Architecture"/>
				<updated>2012-04-20T06:46:01Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: /* Register-level parallelism */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;==Stored Programs==&lt;br /&gt;
The [http://en.wikipedia.org/wiki/Von_Neumann_architecture stored-program model] of [http://en.wikipedia.org/wiki/John_von_Neumann Von Neumann] suggests a [http://en.wikipedia.org/wiki/Turing_equivalent Turing-equivalent] physical device that, using modern manufacturing and materials, is at once:&lt;br /&gt;
*Fast (usefully many transitions of a Turing machine can be emulated per unit time),&lt;br /&gt;
*Reliable (the probability of undetected and detected errors can be meaningfully bounded), and&lt;br /&gt;
*Reprogrammable at a purely symbolic, as opposed to physical, level&lt;br /&gt;
[[Digital]], finite transformations will be performed by processing units connected to memories (stores) and I/O devices.&lt;br /&gt;
*By '''[[digital]]''', we mean that [http://en.wikipedia.org/wiki/Irrational_number irrational numbers] cannot be faithfully reproduced in variables, nor [http://en.wikipedia.org/wiki/Analog_signal analog signals] in samples -- we can work directly (without approximation) only with [http://en.wikipedia.org/wiki/Countable_set countable sets] (see the [[real computing]] of Blum et al for another perspective).&lt;br /&gt;
*By '''finite''', we mean that a given store can contain only a [http://en.wikipedia.org/wiki/Finite_set finite set] of strings having finite [http://en.wikipedia.org/wiki/Shannon's_source_coding_theorem Shannon Entropy] -- essentially, finite integers. By combining the two, our domain becomes finite sets of finite [http://en.wikipedia.org/wiki/Algorithmic_complexity_theory algorithmic complexity theory] (or so I understand things to work) -- the so-called [http://en.wikipedia.org/wiki/Computable_number computable numbers].&lt;br /&gt;
*'''Processing units''' expose simple functional building blocks (maps from finite sets of integers to finite sets of integers) and communication primitives through which connected devices might be manipulated. An [http://en.wikipedia.org/wiki/Instruction_set_architecture instruction set architecture (ISA)] defines the syntax and semantics of these finite languages.&lt;br /&gt;
*'''Memories''' provide finite storage areas parameterized any number of ways (cost, burst rate, sustained rate, latency, reliability, etc). Arbitrary finite binary strings can be placed into memories by the processor.&lt;br /&gt;
*'''I/O devices''' provide samples from the world external to this computing system.&lt;br /&gt;
Arbitrary finite strings in any non-empty alphabet are sufficient to encode any finite, discrete information, including programs expressed in the ISA.&lt;br /&gt;
&lt;br /&gt;
In the sequential execution model, each processing unit contains a program counter. The processor fetches the first instruction from memory, as indexed by the program counter. The program counter is then incremented. The instruction's operands, if any, are fetched, and it is executed. Execution might result in changes to the architectural state (including the program counter) of the processor, to memory, and/or to I/O devices. These changes are committed, and the next instruction is fetched. Each instruction might correspond to many clock cycles. This model is dominant among general-purpose microprocessors; for other models, see [http://en.wikipedia.org/wiki/Dataflow_architecture dataflow architectures] and [http://en.wikipedia.org/wiki/Transport_triggered_architecture transport-triggered architectures]. Out-of-order processors combine stored, serialized programs with data flow-based triggering, yielding &amp;quot;restricted data flow architectures&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
==Parallelism==&lt;br /&gt;
===Bit-level parallelism===&lt;br /&gt;
===Register-level parallelism===&lt;br /&gt;
* See the [[SIMD page]].&lt;br /&gt;
&lt;br /&gt;
===Instruction Level parallelism===&lt;br /&gt;
===Memory Level parallelism===&lt;br /&gt;
===Thread Level parallelism===&lt;br /&gt;
&lt;br /&gt;
==Hardware==&lt;br /&gt;
===Memory Hierarchies===&lt;br /&gt;
Processor clocking and even instruction set design is intimately related to access times of the lowest-level cache of the main memory.&lt;br /&gt;
* Stores: large, off-chip memories. System [[DRAM]] provides a volatile store (this is typically what's meant by &amp;quot;main memory&amp;quot;), while ferromagnetic and optical disks provide non-volatile, slower, larger stores (often called &amp;quot;secondary memory&amp;quot;). As stores get larger, access times usually increase; taken to an extreme, the Internet is just a highly unreliable, massively-distributed store exhibiting wildly varying access times: a memory for all mankind.&lt;br /&gt;
* [[Architecture#Caches|Caches]]: Submemories. Performance-critical components of a store's abstraction -- like any abstraction's internals, their user [[Cache-oblivious algorithms|oughtn't need know them]] to make use of the abstraction, but [[Cache-aware algorithms|might require intimate knowledge]] to make full and efficient use! SRAM close to or on the chip serves as (often multiple-level) caches for main system [[DRAM]]. A section of [[DRAM]] is often used as a &amp;quot;page cache&amp;quot; for system disk (system [[DRAM]] as a whole, however, is *not* a cache of disk. Swap is a part of virtual memory implementation and not germane to discussion of cache). Caches take advantage of predictable access patterns (temporal clustering, spatial clustering, software and hardware prefetching) to provide faster access to a subset of the memory abstraction. In exchange, they add complexity, draw power, and often consume both large swaths of a system's transistor budget and prime real estate. In the absence of accurate prediction (very random patterns, woefully undersized cache, etc), the memory system is said to be thrashing, and performance can be substantially worsened relative to an uncached memory. Usually, however, caches lead to drastic performance improvements.&lt;br /&gt;
** In a computer architecture context, &amp;quot;cache&amp;quot; usually refers only to the (possibly-multilevel) caches of main memory.&lt;br /&gt;
** In an OS context, &amp;quot;cache&amp;quot; might refer to any store.&lt;br /&gt;
* Data units: Generally known as registers, this memory is directly available to execution units. It is capable of being updated every cycle, although such a supply might be impossible. Read and write ports directly connects the register file to [[Combinatorial devices|combinatorial hardware]] and main memory. On some architectures, instructions can directly reference memory.&lt;br /&gt;
Memory hierarchies are highly discretized. Storage offered by different memories usually involves quantitative shifts measured in orders of magnitude, as does time required to access them -- nanoseconds for small on-die SRAMs, microseconds for uncached access to system [[DRAM]], milliseconds for hard drive accesses, fractions of a second for network transfers (hey, it still beats the post office).&lt;br /&gt;
&lt;br /&gt;
====Caches====&lt;br /&gt;
Given the tradeoff and potentialities involved in cache design, and the wide gap between access times of different stores, caches are often multitiered. Current processors often support three levels of hardware cache; almost all disks provide a few megabytes of [[DRAM]] as a cache well before, and for different purposes than, the operating system introduces a page cache. Among the levels of a multitiered cache, two levels can be:&lt;br /&gt;
* inclusive: the lower level is a strict subset of data available in the higher level&lt;br /&gt;
* exclusive: the caches share no data&lt;br /&gt;
* unrelated: data might be present in both caches&lt;br /&gt;
Exclusive caches minimize redundancy between cache levels, but force complexity in multiprocessor systems and even in uniprocessor systems with different line lengths across cache levels.&lt;br /&gt;
Similarly, the main memory's cache is often split into an instruction cache and data cache, with their own ports (and possibly different implementations and sizes), yielding improved access times and fewer structural hazards (instructions can be fetched, while in another unit data are accessed, without structural hazards or expensive logic). A unified cache can make more complete use of the memory available, however, especially for very small programs, effectively trading the risk of conflicts for greater capacity.&lt;br /&gt;
&lt;br /&gt;
Reads are the common case -- 1 instruction cache hit (barring trace caches, etc) for every instruction issued, and loads usually substantially outweighing stores for data cache (or unified cache) access. They're also faster (assuming the data is in cache): the processor needn't specify the width of the load, and the data can be loaded while the tag is being checked -- if the tag doesn't match, no harm is done. Writes must wait for the tag to be verified. Write-combining can be performed in unflushed write buffers or dirty lines of a write-back cache, saving memory bandwidth. Writing policies (configured on the x86 via [[MTRR]]s or [[PAT]]s) include:&lt;br /&gt;
* Write-through: the write propagates out throughout the store abstraction (ie, from L1 cache, over an exclusive L2 cache, to system [[DRAM]]). Simple to implement, as writes need no buffers and loads resulting in evictions never force writebacks. Cache and backing store exhibit data coherence (observers never see a different value in memory than what's in cache), a useful property in the presence of multiple cores or DMA. In order to write at the full speed of the cache, writes must be buffered; for a load which overwhelms the write buffer, or in its absence, the processor will see write stalls above and beyond the cache timings even for cached data.&lt;br /&gt;
* Write-back: the write is only applied to the cache. Memory is updated when the line is replaced. Minimizes latency for the attached execution unit -- potential write throughput is equivalent to that of the cache. Saves memory bandwidth and power, but requires a coherency protocol (with its own state requirements). Minimally, a dirty bit indicates that the line need be written back upon eviction. In the presence of multiple, independent caches at the same level of a store abstraction, full cache coherency protocols such as MESI are used. Write-back caches also tend to employ write buffers (so that reads might be prioritized; see below), also known as &amp;quot;victim buffers&amp;quot; by AMD (not to be concerned with victim caches, small fast direct-mapped stores into which all evicted lines go, not just dirty ones -- the goal of this latter is to minimize the impact of conflict misses, not eliminate blocking on writebacks).&lt;br /&gt;
&lt;br /&gt;
A cache hit occurs when data being referenced is valid in the cache; otherwise the reference is a cache miss. A bit is typically devoted to determining validity of a cacheline. The cache is initialized so that all lines are marked invalid. As lines are loaded, they become valid. In the absence of cache coherency protocols and context switches, lines once valid will remain valid (but might change address); other processors' writes might invalidate lines in a multicore system. Misses are categorized into four types:&lt;br /&gt;
* Compulsory miss, if the data had not yet been referenced. It has otherwise been evicted and is a...&lt;br /&gt;
* Coherence miss, if another processor invalidated this line&lt;br /&gt;
* Capacity miss, if the eviction (and thus miss) would have occurred despite full associativity.&lt;br /&gt;
* Conflict miss, otherwise. A fully-associative cache, by definition, never suffers conflict misses.&lt;br /&gt;
If there are no suitable invalid lines for a cache miss, there will be a cache replacement. In the absence of direct mapping (ie, n-associativity where n&amp;gt;1), a non-trivial replacement policy decides which member of a set to evict. Page faults are managed by the operating system, due to the high miss latencies and importance of making a good eviction decision. These algorithms are widely varied, and beyond the scope of this article. Architectural policies for cache replacement are primarily measured by their preservation of temporal locality, and include:&lt;br /&gt;
* LRU: This can be and is implemented several ways (high-speed stack, use of lg2(n) bits to track only the one truly least recently used element (&amp;quot;True LRU&amp;quot;), the 2Q algorithm...I've got an idea that uses indexes into permutation tables). Most expensive, in terms of space and time. Maximizes use of temporal locality -- for m&amp;lt;n references which go unused, n-m reused references will remain in cache. Every access results in an update, and some implementations require multiple updates per access. Fundamentally exponential state requirements generally preclude precise LRU for large n.&lt;br /&gt;
* Pseudo-LRU: Uses n-1 bits to weigh paths in a full binary tree of height lg2(n). Exhibits O(1) selection time, but requires an O(1) update on every access (like LRU). Tracks some patterns well, others poorly (''FIXME'' find better analysis).&lt;br /&gt;
* FIFO: The oldest (as opposed to least-recently-used) line is evicted. This can be implemented in O(1) selection and update time via n bits per set (it's simply a counter modulo 2^n). Updates are only performed upon a replacement, as opposed to every access.&lt;br /&gt;
* Random: Since complexity is traded off against preservation of temporal locality, programs exhibiting little temporal locality (randomly-accessed databases) are best served by the simplest solution surjective onto members of a set. This can be done with a pseudorandom replacement policy. Such a cache usually allows programmer control of seeding, to support debugging and profiling.&lt;br /&gt;
Write misses are relatively rare; when they do occur, either a line is evicted and the standard write policy is invoked, or in a &amp;quot;non-write-allocating&amp;quot; policy the missing caches are untouched. This is rare for write-back caches of volatile memory, since data written therein is usually read. It makes more sense in a non-volatile memory's cache (H&amp;amp;P4 C-14 says this is also true for volatile write-through, but I find their reasoning to be flawed due to write buffers). Note that the processor stalls earlier in the pipeline due to read misses than write misses.&lt;br /&gt;
&lt;br /&gt;
Memory performance is quantized in terms of average memory access time (AMAT), equal to hit penalty + miss rate * miss penalty (this being the penalty added by the miss, not end-to-end latency for a miss; this latter would be hit penalty + miss penalty) and expressed in terms of cycles or, less commonly, absolute time (calculating or indeed defining miss penalty for out-of-order, especially superscalar, processors is difficult, and done various ways). Thus, memories can be improved by (assuming other parameters are held constant):&lt;br /&gt;
* Reducing hit penalty: avoid address translation (use the virtual address -- VIVT, Virtual-Index/Virtual-Tag)&lt;br /&gt;
* Improving hit rate: increase number of lines, increase line length, increase associativity&lt;br /&gt;
* Reducing miss penalty: multilevel caches, prioritizing reads over writes&lt;br /&gt;
* Parallelizing: interleaved/banked cache&lt;br /&gt;
&lt;br /&gt;
Avoiding address translation introduces aliasing: a single cacheline worth of backing store might be represented twice in a cache, since each process (usually) has its own virtual memory. It also forces page access settings to be copied into the cache from the TLB, and PID-tagging lest cache flushes be required upon context switches. Thus, VIPT -- Virtual-Index, Physical-Tag -- translation is performed in parallel with indexing based solely upon the page offset (shared between physical and virtual addresses), and physical addresses are used beyond the lowest-level cache (PIPT, Physical-Index Physical-Tag). Adding capacity incurs transistor and power cost, and can slightly increase access penalty. Increasing associativity can increase access penalty even more, and also has hardware costs. Augmenting either can actually decrease hit rates for a given workload, due to the interactions between addresses and cache geometry. There's four rules of thumb here:&lt;br /&gt;
* Associativity beyond 8-way is useless, except for very small (a few K at most) caches&lt;br /&gt;
* For caches less than a hundred K or so, miss rate for fKb under 2-way associativity ~= miss rate for 2fKb direct mapped&lt;br /&gt;
* Associativity, especially beyond 2-way, is a bad idea for large caches...&lt;br /&gt;
* Unless it's a second-level cache or higher, in which case 2-way is just about right.&lt;br /&gt;
Increasing cacheline length is the only way to reduce compulsory misses (at the expense of increased latency loading misses, although this can be addressed via &amp;quot;early-restart&amp;quot; or &amp;quot;critical first&amp;quot; load schemes), but with insufficient spatial locality longer cachelines lead to increased conflict or even capacity misses and waste memory bandwidth. High-bandwidth, high-latency memories are thus well-suited to large cachelines, as are stream-oriented tasks.&lt;br /&gt;
&lt;br /&gt;
====Virtual Memory====&lt;br /&gt;
[[File:Memoryhierarchy.png|thumb|right|alt=&amp;quot;Diagram of address translation&amp;quot;]]&lt;br /&gt;
&lt;br /&gt;
==See Also==&lt;br /&gt;
* Intel's [http://www.tomshardware.com/reviews/intel-atom-cpu,1947-6.html Atom] uses an eight-transistor (and thus lower-voltage) SRAM technology?&lt;br /&gt;
* Agner Fog's Intel and AMD [http://www.agner.org/optimize/ microarchitecture references]&lt;br /&gt;
[[Category: x86]]&lt;br /&gt;
[[Category: CS GRE Prep]]&lt;br /&gt;
[[CATEGORY: Hardware]]&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/PDF</id>
		<title>PDF</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/PDF"/>
				<updated>2012-04-20T06:02:40Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;* Combining PDFs: &amp;lt;tt&amp;gt;gs -dNOPAUSE -sDEVICE=pdfwrite -sOUTPUTFILE=output.pdf -dBATCH files-to-combine&amp;lt;/tt&amp;gt;&lt;br /&gt;
* Select pages: &amp;lt;tt&amp;gt;pdftk old.pdf cat pageranges output new.pdf&amp;lt;/tt&amp;gt;&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Growlight</id>
		<title>Growlight</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Growlight"/>
				<updated>2012-04-16T16:24:48Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;[[File:growlight.jpg]]&lt;br /&gt;
&lt;br /&gt;
[http://www.sprezzatech.com/growlight.html Growlight] is Sprezzatech's installer project, designed for use with [http://www.sprezzatech.com/sprezzos.html SprezzOS].&lt;br /&gt;
&lt;br /&gt;
==Definite Goals==&lt;br /&gt;
* Boot with a single image on UEFI/BIOS-based machines&lt;br /&gt;
** http://mjg59.dreamwidth.org/4957.html&lt;br /&gt;
** http://fedoraproject.org/wiki/Anaconda/Features/UEFI&lt;br /&gt;
* As much compatibility with [[debian installer]] as is reasonable/justified&lt;br /&gt;
** http://meetings-archive.debian.net/pub/debian-meetings/2006/debconf6/slides/Debian_installer_workshop-Frans_Pop/paper/&lt;br /&gt;
* Look as good as is reasonable&lt;br /&gt;
===Disks===&lt;br /&gt;
* Fully support [[ZFS]] during install, include RAIDZ setup&lt;br /&gt;
* Use GPT (correctly) by default.&lt;br /&gt;
* Extract true parameters from SSDs and 4k sector (especially WD-EARS) drives&lt;br /&gt;
* Properly align everything&lt;br /&gt;
&lt;br /&gt;
===Possible Goals===&lt;br /&gt;
* Install either Linux or FreeBSD&lt;br /&gt;
* Look as good as is possible&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Growlight</id>
		<title>Growlight</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Growlight"/>
				<updated>2012-04-16T03:48:04Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: /* Definite Goals */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;[[File:growlight.jpg|right|growlight logo|thumb]]&lt;br /&gt;
&lt;br /&gt;
[http://www.sprezzatech.com/growlight.html Growlight] is Sprezzatech's installer project, designed for use with [http://www.sprezzatech.com/sprezzos.html SprezzOS].&lt;br /&gt;
&lt;br /&gt;
==Definite Goals==&lt;br /&gt;
* Boot with a single image on UEFI/BIOS-based machines&lt;br /&gt;
** http://mjg59.dreamwidth.org/4957.html&lt;br /&gt;
** http://fedoraproject.org/wiki/Anaconda/Features/UEFI&lt;br /&gt;
* As much compatibility with [[debian installer]] as is reasonable/justified&lt;br /&gt;
** http://meetings-archive.debian.net/pub/debian-meetings/2006/debconf6/slides/Debian_installer_workshop-Frans_Pop/paper/&lt;br /&gt;
* Look as good as is reasonable&lt;br /&gt;
===Disks===&lt;br /&gt;
* Fully support [[ZFS]] during install, include RAIDZ setup&lt;br /&gt;
* Use GPT (correctly) by default.&lt;br /&gt;
* Extract true parameters from SSDs and 4k sector (especially WD-EARS) drives&lt;br /&gt;
* Properly align everything&lt;br /&gt;
&lt;br /&gt;
===Possible Goals===&lt;br /&gt;
* Install either Linux or FreeBSD&lt;br /&gt;
* Look as good as is possible&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Growlight</id>
		<title>Growlight</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Growlight"/>
				<updated>2012-04-16T02:40:30Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;[[File:growlight.jpg|right|growlight logo|thumb]]&lt;br /&gt;
&lt;br /&gt;
[http://www.sprezzatech.com/growlight.html Growlight] is Sprezzatech's installer project, designed for use with [http://www.sprezzatech.com/sprezzos.html SprezzOS].&lt;br /&gt;
&lt;br /&gt;
==Definite Goals==&lt;br /&gt;
* Boot with a single image on UEFI/BIOS-based machines&lt;br /&gt;
** http://mjg59.dreamwidth.org/4957.html&lt;br /&gt;
* As much compatibility with [[debian installer]] as is reasonable/justified&lt;br /&gt;
** http://meetings-archive.debian.net/pub/debian-meetings/2006/debconf6/slides/Debian_installer_workshop-Frans_Pop/paper/&lt;br /&gt;
* Fully support [[ZFS]] during install&lt;br /&gt;
* Look as good as is reasonable&lt;br /&gt;
&lt;br /&gt;
===Possible Goals===&lt;br /&gt;
* Install either Linux or FreeBSD&lt;br /&gt;
* Look as good as is possible&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Growlight</id>
		<title>Growlight</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Growlight"/>
				<updated>2012-04-16T02:39:40Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;[[File:growlight.jpg|right|growlight logo|thumb]]&lt;br /&gt;
&lt;br /&gt;
==Definite Goals==&lt;br /&gt;
* Boot with a single image on UEFI/BIOS-based machines&lt;br /&gt;
** http://mjg59.dreamwidth.org/4957.html&lt;br /&gt;
* As much compatibility with [[debian installer]] as is reasonable/justified&lt;br /&gt;
** http://meetings-archive.debian.net/pub/debian-meetings/2006/debconf6/slides/Debian_installer_workshop-Frans_Pop/paper/&lt;br /&gt;
* Fully support [[ZFS]] during install&lt;br /&gt;
* Look as good as is reasonable&lt;br /&gt;
&lt;br /&gt;
===Possible Goals===&lt;br /&gt;
* Install either Linux or FreeBSD&lt;br /&gt;
* Look as good as is possible&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/File:Growlight.jpg</id>
		<title>File:Growlight.jpg</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/File:Growlight.jpg"/>
				<updated>2012-04-16T02:38:24Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: Logo of the [http://www.sprezzatech.com/growlight.html growlight] project.&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;Logo of the [http://www.sprezzatech.com/growlight.html growlight] project.&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Growlight</id>
		<title>Growlight</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Growlight"/>
				<updated>2012-04-16T02:37:39Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: /* Definite Goals */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;[[File:growlight.jpg|right|http://www.sprezzatech.com/growlight.html]]&lt;br /&gt;
&lt;br /&gt;
==Definite Goals==&lt;br /&gt;
* Boot with a single image on UEFI/BIOS-based machines&lt;br /&gt;
** http://mjg59.dreamwidth.org/4957.html&lt;br /&gt;
* As much compatibility with [[debian installer]] as is reasonable/justified&lt;br /&gt;
** http://meetings-archive.debian.net/pub/debian-meetings/2006/debconf6/slides/Debian_installer_workshop-Frans_Pop/paper/&lt;br /&gt;
* Fully support [[ZFS]] during install&lt;br /&gt;
* Look as good as is reasonable&lt;br /&gt;
&lt;br /&gt;
===Possible Goals===&lt;br /&gt;
* Install either Linux or FreeBSD&lt;br /&gt;
* Look as good as is possible&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Growlight</id>
		<title>Growlight</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Growlight"/>
				<updated>2012-04-16T02:37:16Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: Created page with &amp;quot;http://www.sprezzatech.com/growlight.html  ==Definite Goals== * Boot with a single image on UEFI/BIOS-based machines ** http://mjg59.dreamwidth.or...&amp;quot;&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;[[File:growlight.jpg|right|http://www.sprezzatech.com/growlight.html]]&lt;br /&gt;
&lt;br /&gt;
==Definite Goals==&lt;br /&gt;
* Boot with a single image on UEFI/BIOS-based machines&lt;br /&gt;
** http://mjg59.dreamwidth.org/4957.html&lt;br /&gt;
* As much compatibility with [[debian-installer]] as is reasonable/justified&lt;br /&gt;
** http://meetings-archive.debian.net/pub/debian-meetings/2006/debconf6/slides/Debian_installer_workshop-Frans_Pop/paper/&lt;br /&gt;
* Fully support [[ZFS]] during install&lt;br /&gt;
* Look as good as is reasonable&lt;br /&gt;
&lt;br /&gt;
===Possible Goals===&lt;br /&gt;
* Install either Linux or FreeBSD&lt;br /&gt;
* Look as good as is possible&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Debian_installer</id>
		<title>Debian installer</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Debian_installer"/>
				<updated>2012-04-16T00:27:40Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;I've been modifying the [[Debian]] installer for the first release of [http://www.sprezzos.com SprezzOS]. It's been quite the PITA.&lt;br /&gt;
==Build environment==&lt;br /&gt;
* debootstrap --variant buildd http://ftp.us.debian.org unstable&lt;br /&gt;
* apt-get source debian-installer&lt;br /&gt;
** the resulting directory is DIROOT&lt;br /&gt;
&lt;br /&gt;
==Custom debian-installer==&lt;br /&gt;
* enter DIROOT&lt;br /&gt;
* edit build/conf/common&lt;br /&gt;
* ensure any custom udebs are in build/localudebs&lt;br /&gt;
* ensure any custom udebs are listed in build/pkg-lists/local&lt;br /&gt;
* dpkg-buildpackage&lt;br /&gt;
* for simple-cdd (outside the chroot):&lt;br /&gt;
** mkdir -p tmp/mirror/dists/sid/main/installer-amd64/current/images/&lt;br /&gt;
** cp -r DIROOT/build/dest/* tmp/mirror/dists/sid/main/installer-amd64/current/images/&lt;br /&gt;
** add &amp;quot;custom_installer=DIROOT/build/dest&amp;quot; to simple-cdd's configuration file&lt;br /&gt;
** add the debian-installer deb to --local-packages&lt;br /&gt;
** add DIROOT/build/localudebs to --local-packages&lt;br /&gt;
&lt;br /&gt;
==Custom kernel==&lt;br /&gt;
* apt-get source linux-2.6&lt;br /&gt;
** apt-get install linux-source-3.2 gets you a /usr/src tarball with no debian/ subdirectory&lt;br /&gt;
** apt-get install linux-source gets you something called 'linux_latest' (investigate!)&lt;br /&gt;
* cd linux-2.6-3.2.14 or whatever&lt;br /&gt;
* dpkg-buildpackage -j8&lt;br /&gt;
output includes a full set of udebs:&lt;br /&gt;
&amp;lt;pre&amp;gt;root@skynet:/linux-2.6-3.2.14# ls ../*udeb&lt;br /&gt;
../acpi-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../ata-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../btrfs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../cdrom-core-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../core-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../crc-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../crypto-dm-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../crypto-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../efi-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../event-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../ext2-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../ext3-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../ext4-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../fat-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../fb-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../firewire-core-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../floppy-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../i2c-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../input-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../irda-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../isofs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../jfs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../kernel-image-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../loop-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../md-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../mmc-core-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../mmc-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../mouse-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../multipath-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../nbd-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../nic-extra-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../nic-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../nic-pcmcia-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../nic-shared-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../nic-usb-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../nic-wireless-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../ntfs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../parport-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../pata-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../pcmcia-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../pcmcia-storage-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../plip-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../ppp-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../qnx4-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../reiserfs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../sata-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../scsi-common-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../scsi-core-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../scsi-extra-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../scsi-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../serial-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../sound-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../speakup-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../squashfs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../ufs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../uinput-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../usb-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../usb-serial-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../usb-storage-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../virtio-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../xfs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../zlib-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
root@skynet:/linux-2.6-3.2.14# &amp;lt;/pre&amp;gt;&lt;br /&gt;
* cp *udeb DIROOT/build/localudebs&lt;br /&gt;
* add their names to new file DIROOT/build/pkg-lists/local&lt;br /&gt;
* add &amp;lt;tt&amp;gt;deb copy:/DIROOT/build/ localudebs/&amp;lt;/tt&amp;gt; to DIROOT/build/sources.list.udeb.local&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Debian_installer</id>
		<title>Debian installer</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Debian_installer"/>
				<updated>2012-04-15T17:13:18Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: /* Custom kernel */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;I've been modifying the [[Debian]] installer for the first release of [http://www.sprezzos.com SprezzOS]. It's been quite the PITA.&lt;br /&gt;
==Build environment==&lt;br /&gt;
* debootstrap --variant buildd http://ftp.us.debian.org unstable&lt;br /&gt;
* apt-get source debian-installer&lt;br /&gt;
&lt;br /&gt;
==Custom kernel==&lt;br /&gt;
* apt-get source linux-2.6&lt;br /&gt;
** apt-get install linux-source-3.2 gets you a /usr/src tarball with no debian/ subdirectory&lt;br /&gt;
** apt-get install linux-source gets you something called 'linux_latest' (investigate!)&lt;br /&gt;
* cd linux-2.6-3.2.14 or whatever&lt;br /&gt;
* dpkg-buildpackage -j8&lt;br /&gt;
output includes a full set of udebs:&lt;br /&gt;
&amp;lt;pre&amp;gt;root@skynet:/linux-2.6-3.2.14# ls ../*udeb&lt;br /&gt;
../acpi-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../ata-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../btrfs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../cdrom-core-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../core-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../crc-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../crypto-dm-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../crypto-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../efi-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../event-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../ext2-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../ext3-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../ext4-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../fat-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../fb-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../firewire-core-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../floppy-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../i2c-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../input-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../irda-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../isofs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../jfs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../kernel-image-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../loop-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../md-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../mmc-core-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../mmc-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../mouse-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../multipath-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../nbd-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../nic-extra-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../nic-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../nic-pcmcia-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../nic-shared-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../nic-usb-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../nic-wireless-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../ntfs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../parport-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../pata-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../pcmcia-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../pcmcia-storage-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../plip-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../ppp-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../qnx4-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../reiserfs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../sata-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../scsi-common-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../scsi-core-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../scsi-extra-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../scsi-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../serial-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../sound-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../speakup-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../squashfs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../ufs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../uinput-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../usb-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../usb-serial-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../usb-storage-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../virtio-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../xfs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../zlib-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
root@skynet:/linux-2.6-3.2.14# &amp;lt;/pre&amp;gt;&lt;br /&gt;
* cp *udeb DIROOT/build/localudebs&lt;br /&gt;
* add their names to new file DIROOT/build/pkg-lists/local&lt;br /&gt;
* add &amp;lt;tt&amp;gt;deb copy:/DIROOT/build/ localudebs/&amp;lt;/tt&amp;gt; to DIROOT/build/sources.list.udeb.local&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	<entry>
		<id>http://dank.qemfd.net/dankwiki/index.php/Debian_installer</id>
		<title>Debian installer</title>
		<link rel="alternate" type="text/html" href="http://dank.qemfd.net/dankwiki/index.php/Debian_installer"/>
				<updated>2012-04-15T17:09:03Z</updated>
		
		<summary type="html">&lt;p&gt;Dank: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;I've been modifying the [[Debian]] installer for the first release of [http://www.sprezzos.com SprezzOS]. It's been quite the PITA.&lt;br /&gt;
==Build environment==&lt;br /&gt;
* debootstrap --variant buildd http://ftp.us.debian.org unstable&lt;br /&gt;
* apt-get source debian-installer&lt;br /&gt;
&lt;br /&gt;
==Custom kernel==&lt;br /&gt;
* apt-get source linux-2.6&lt;br /&gt;
** apt-get install linux-source-3.2 gets you a /usr/src tarball with no debian/ subdirectory&lt;br /&gt;
** apt-get install linux-source gets you something called 'linux_latest' (investigate!)&lt;br /&gt;
* cd linux-2.6-3.2.14 or whatever&lt;br /&gt;
* dpkg-buildpackage -j8&lt;br /&gt;
output includes a full set of udebs:&lt;br /&gt;
&amp;lt;pre&amp;gt;root@skynet:/linux-2.6-3.2.14# ls ../*udeb&lt;br /&gt;
../acpi-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../ata-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../btrfs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../cdrom-core-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../core-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../crc-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../crypto-dm-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../crypto-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../efi-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../event-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../ext2-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../ext3-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../ext4-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../fat-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../fb-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../firewire-core-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../floppy-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../i2c-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../input-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../irda-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../isofs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../jfs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../kernel-image-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../loop-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../md-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../mmc-core-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../mmc-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../mouse-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../multipath-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../nbd-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../nic-extra-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../nic-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../nic-pcmcia-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../nic-shared-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../nic-usb-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../nic-wireless-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../ntfs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../parport-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../pata-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../pcmcia-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../pcmcia-storage-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../plip-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../ppp-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../qnx4-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../reiserfs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../sata-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../scsi-common-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../scsi-core-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../scsi-extra-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../scsi-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../serial-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../sound-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../speakup-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../squashfs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../ufs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../uinput-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../usb-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../usb-serial-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../usb-storage-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../virtio-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../xfs-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
../zlib-modules-3.2.0-2-amd64-di_3.2.14-1_amd64.udeb&lt;br /&gt;
root@skynet:/linux-2.6-3.2.14# &amp;lt;/pre&amp;gt;&lt;br /&gt;
* cp *udeb DIROOT/build/localudebs&lt;br /&gt;
* add their names to new file DIROOT/build/pkg-lists/local&lt;/div&gt;</summary>
		<author><name>Dank</name></author>	</entry>

	</feed>
